Semiconductor Contact Structure With Air Gaps for Lower Parasitic Capacitance
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Solution Overview
Problem
As semiconductor devices become highly integrated, the reduced space between patterns and contact plugs leads to increased parasitic capacitance, which deteriorates device performance by reducing operation speed.
Innovation Solution
Incorporating air gaps between contact plugs and line patterns, with a landing pad covering part of the air gap and an insulating layer on the uncovered part, along with protecting spacers, to reduce parasitic capacitance while maintaining device integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the space between patterns and contact plugs is reduced to achieve higher integration, then device integration density is improved, but parasitic capacitance increases causing performance deterioration
Solution Approach 1:
The patent introduces air gaps as intermediary structures between conductive patterns and contact plugs. These air gaps act as mediators that reduce parasitic capacitance while allowing the patterns and contact plugs to remain in close proximity for high integration. The air gap serves as a low-dielectric constant material that mediates the electrical interaction between adjacent conductive elements.
Solution Approach 2:
The patent applies different dielectric properties to different regions of the device. Specifically, air gaps with low dielectric constant are introduced in critical areas where parasitic capacitance is problematic, while other regions maintain their original dielectric structures. This local modification of dielectric quality reduces parasitic capacitance without affecting the overall device integration.
2Reliability
If air gaps are introduced to reduce parasitic capacitance, then performance is improved, but device structure becomes more complex
Solution Approach 1:
The patent combines the air gap formation process with existing spacer formation processes. The air gaps are created by removing sacrificial spacers that were already part of the self-aligned fabrication process. This merging of processes introduces air gaps without requiring entirely new fabrication steps, thereby limiting the increase in device complexity.
Solution Approach 2:
The patent incorporates air gap formation into preliminary fabrication steps before final device assembly. By forming air gaps early in the manufacturing process through sacrificial spacer removal, the structure is prepared in advance, and subsequent processing steps can proceed without additional complexity. The air gaps are established as part of the base device architecture rather than as later additions.
Data Source
AI summary
A semiconductor device includes a pair of line patterns disposed on a substrate. A contact plug is disposed between the pair of line patterns and an air gap is disposed between the contact plug and the line patterns. A landing pad extends from a top end of the contact plug to cover a first part of the air gap and an insulating layer is disposed on a second part of the air gap, which is not covered by the landing pad.