Semiconductor Air Gap Formation for Parasitic Capacitance Reduction
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Solution Overview
Problem
As semiconductor devices become more integrated, the close proximity of conductive structures increases parasitic capacitance, degrading device performance, and reducing the dielectric constant of dielectric materials only partially addresses this issue.
Innovation Solution
The formation of air gaps between bit line structures and island-type plugs, achieved through the creation of sacrificial spacers, etching, and plug isolation layers, effectively reduces parasitic capacitance by isolating neighboring plugs and transforming air gaps into isolated-type gaps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dielectric material is used between conductive structures, then insulation is provided, but parasitic capacitance increases due to high dielectric constant
Solution Approach 1:
The patent extracts the dielectric material from the space between conductive structures and replaces it with air gaps. By removing the solid dielectric material and creating void spaces filled with air (or vacuum), the parasitic capacitance is significantly reduced while maintaining the necessary electrical insulation between bit lines and plugs.
Solution Approach 2:
The patent changes the dielectric parameter from solid dielectric material (high dielectric constant) to air (low dielectric constant). This parameter change from solid to gaseous phase material fundamentally alters the capacitance characteristics, reducing parasitic capacitance while preserving insulation functionality.
2Productivity
If conductive structures are placed closer together for high integration, then device density increases, but parasitic capacitance increases
Solution Approach 1:
The patent applies local quality by creating air gaps specifically in the regions between bit lines and plugs where parasitic capacitance is problematic, while maintaining close proximity of conductive structures elsewhere for high integration. The air gaps are selectively formed only where needed to reduce capacitance without compromising overall device density.
3Object-affected harmful factors
If air gaps are formed between bit line structures and plugs, then parasitic capacitance is reduced, but manufacturing process complexity increases
Solution Approach 1:
The patent applies preliminary action by forming sacrificial spacers before forming the bit lines and plugs. These sacrificial spacers are deposited and patterned in advance to define the future air gap locations. Subsequent etching processes then use these pre-formed spacers as masks to create the air gaps, simplifying the overall manufacturing sequence.
Solution Approach 2:
The patent uses sacrificial spacers as intermediary materials to facilitate air gap formation. The spacers are temporarily introduced into the structure, serve as etch masks to define air gap regions, and are subsequently removed to create the desired air gaps. This intermediary approach simplifies the manufacturing process compared to direct air gap formation methods.
Data Source
AI summary
A method for fabricating a semiconductor device includes: forming a plurality of bit line structures over a semiconductor substrate; forming a line-type opening between the bit line structures; forming a sacrificial spacer on both sidewalls of the line-type opening; forming a line-type plug filling the line-type opening over the sacrificial spacer; forming a plurality of plug isolation openings that expose the sacrificial spacer by etching a portion of the line-type plug in a direction crossing the bit line structures; forming a plurality of air gaps by removing the exposed sacrificial spacer; removing a remaining line-type plug below the plug isolation openings to form a plurality of island-type plugs; and forming a plug isolation layer inside the plug isolation openings to isolate neighboring island-type plugs from each other.