Semiconductor Device Air Gap Formation via Porous Insulating Layer
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Solution Overview
Problem
As integrated circuits increase in density, adjacent cells can interfere with each other through coupling mechanisms, threatening the reliability of semiconductor devices.
Innovation Solution
A semiconductor device is fabricated by forming trenches in a substrate, creating air gaps between lower gate patterns using a porous insulating layer and a liner insulating layer, which reduces cell-to-cell coupling by conformally covering inner surfaces and sidewalls, and using specific silicon source and reaction gases to form the liner insulating layer through thermal CVD or ALD processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If device density is increased to improve integration, then productivity and performance are improved, but cell-to-cell coupling interference increases and reliability deteriorates
Solution Approach 1:
The substrate is divided into isolated active regions by trenches filled with air gaps. This segmentation physically separates adjacent cells, preventing coupling interference while maintaining high device density. The air gap acts as an electrical insulator between neighboring active regions.
Solution Approach 2:
A porous insulating layer is introduced as an intermediary material during fabrication. This layer temporarily occupies the trench space and facilitates the formation of air gaps through its pore structure. The porous layer enables subsequent air gap formation while providing structural support during processing.
2Reliability
If air gaps are formed to reduce cell-to-cell coupling, then reliability is improved, but fabrication complexity increases
Solution Approach 1:
The porous insulating layer is formed in advance before air gap creation. This preliminary structure provides a template that guides subsequent air gap formation. The pre-formed porous layer simplifies the overall process by establishing the spatial framework needed for air gap placement.
Solution Approach 2:
A porous insulating layer with controlled pore structure is used to facilitate air gap formation. The pores in this layer allow for easy removal of sacrificial material and subsequent air gap creation. The porous structure provides both mechanical support during fabrication and a pathway for air gap formation, reducing process complexity.
3Manufacturing precision
If liner insulating layer is formed conformally on trench inner surfaces, then manufacturing precision is improved, but process complexity increases
Solution Approach 1:
Physical vapor deposition or chemical vapor deposition processes are used to form the liner insulating layer conformally on trench surfaces. These deposition methods automatically conform to complex geometries without requiring mechanical masking or alignment steps, achieving high precision coverage while simplifying the overall process.
Solution Approach 2:
The liner insulating layer formation process is self-aligning and self-conforming. The deposition process automatically follows the trench geometry, requiring no additional alignment or positioning steps. The material naturally conforms to the underlying surface topology, achieving precise coverage through the inherent properties of the deposition process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enhances the reliability of semiconductor devices by reducing cell-to-cell interference and simplifying the fabrication process, maintaining device performance while minimizing the risk of process failures.
Implementation Method 1
The forming of the liner insulating layer may include supplying silicon source gas and reaction gas on the porous insulating layer. The silicon source and the reaction gas may pass through the pores and be reacted with each other on the inner surfaces of the trenches.
Implementation Method 2
The liner insulating layer may be formed by a thermal CVD process or an ALD process.
Implementation Method 3
The liner insulating layer may be formed by a thermal CVD process or an ALD process.
Data Source
AI summary
Provided is a semiconductor device and a method of fabricating the same. The method may include forming trenches in a substrate and lower gate patterns on the substrate between the trenches, forming sacrificial patterns filling the trenches, forming a porous insulating layer on the lower gate patterns to cover top surfaces of the sacrificial patterns, removing the sacrificial patterns through pores of the porous insulating layer to form air gaps surrounded by the trenches and the porous insulating layer, and forming a liner insulating layer on inner surfaces of the trenches through the pores of the porous insulating layer.