Semiconductor Air Gap Formation via Sacrificial Spacer Removal
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Highly integrated semiconductor devices face challenges in reducing parasitic capacitance due to the high dielectric constants of materials used, which negatively impact performance.
Innovation Solution
A semiconductor device and method that incorporate air gaps between conductive structures, formed by removing non-conformal sacrificial spacers, to reduce parasitic capacitance, using a multi-layer spacer structure and capping layers to isolate and couple conductive pads effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If dielectric materials are used to isolate neighboring conductive structures, then electrical insulation is provided, but parasitic capacitance increases due to high dielectric constants
Solution Approach 1:
The patent extracts the dielectric material from the isolation structure and replaces it with air gaps. By removing the solid dielectric material between conductive structures and substituting it with air (vacuum), the parasitic capacitance is reduced while maintaining electrical insulation functionality, as air has a lower dielectric constant than conventional dielectric materials.
Solution Approach 2:
The patent changes the dielectric parameter by replacing high dielectric constant materials with air (dielectric constant ≈ 1). This parameter change directly reduces the parasitic capacitance between conductive structures while preserving the electrical insulation function through the air gap structure.
2Object-affected harmful factors
If air gaps are introduced to reduce parasitic capacitance, then electrical interference is minimized, but device complexity increases due to multi-layer spacer structures
Solution Approach 1:
The patent introduces multi-layer spacer structures as intermediary elements to create and maintain air gaps between conductive structures. These spacers act as temporary mediators during fabrication that define the air gap geometry, enabling parasitic capacitance reduction while providing structural support during the manufacturing process.
Solution Approach 2:
The isolation structure is segmented into multiple functional layers including first spacers, second spacers, and capping layers. This segmentation allows each layer to perform specific functions: defining air gap geometry, maintaining structural integrity, and providing electrical insulation, thereby managing device complexity through functional decomposition.
3Object-affected harmful factors
If non-conformal sacrificial spacers are used to form air gaps, then parasitic capacitance is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent employs non-conformal sacrificial spacers that are formed in advance with specific thickness variations to pre-defin e the air gap geometry. This preliminary action establishes the desired air gap dimensions before final structure formation, enabling precise air gap control while reducing the precision requirements of subsequent manufacturing steps.
Solution Approach 2:
The spacers exhibit local quality variations with different thicknesses at different locations (non-conformal structure). This local quality variation allows the air gap dimensions to be precisely controlled in specific regions while maintaining manufacturing feasibility, as the spacer thickness is optimized locally rather than uniformly throughout the structure.
Data Source
AI summary
A method for fabricating a semiconductor device includes: forming a first conductive structure over a substrate; forming a multi-layer spacer including a non-conformal sacrificial spacer on both sidewalls of the first conductive structure; forming a second conductive structure adjacent to the first conductive structure with the multi-layer spacer therebetween; forming an air gap by removing the non-conformal sacrificial spacer; forming a capping layer covering the second conductive structure and the air gap; forming an opening that exposes a top surface of the second conductive structure by etching the capping layer; and forming a conductive pad coupled to the second conductive structure in the opening.