Semiconductor Interconnection Air-Gap Structure for VIMB and TDDB

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Solution Overview

Problem

Existing methods for fabricating semiconductor integrated circuits face challenges in developing improved dielectric and metal interconnection processes and structures, particularly in reducing via-induced-metal-bridge (VIMB) issues and time-dependent-dielectric-breakdown (TDDB) performance, while also aiming to decrease capacitance of metal lines.

Innovation Solution

A method involving the formation of a surrounding-vacancy by removing a sacrificial layer adjacent to a metal via and creating an enclosure-air-gap by sealing the upper portion of the vacancy with a dielectric layer, which integrates to form an air-gap all around the conductive feature, thereby addressing VIMB and TDDB performance and reducing metal line capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional dielectric and metal interconnection processes are used, then manufacturing is simpler, but via-induced-metal-bridge (VIMB) issues and time-dependent-dielectric-breakdown (TDDB) performance deteriorate

Engineering Contradiction:
ImproveVIMB and TDDB performanceVSAvoidinterconnection process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The interconnection structure is segmented into multiple functional layers: a first dielectric layer for insulation, a metal layer for conduction, and a second dielectric layer forming an air-gap structure. This segmentation isolates the metal interconnection from direct contact with surrounding dielectrics, reducing VIMB and TDDB effects while maintaining manufacturing feasibility through standardized layering processes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The air-gap structure formed by the second dielectric layer acts as an intermediary between adjacent metal interconnections. This intermediate air-gap region prevents direct electrical interaction between metal lines, eliminating VIMB issues and reducing capacitive coupling, thereby improving TDDB performance without requiring complex shielding or isolation techniques.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If metal interconnection density is increased to improve circuit functionality, then capacitance of metal lines increases, but signal integrity and speed deteriorate

Engineering Contradiction:
Improvecircuit functionalityVSAvoidsignal transmission speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The invention applies the concept of air-gaps (pneumatic principle) in the interconnection structure by forming a second dielectric layer that creates void spaces between metal interconnections. This air-gap configuration reduces the dielectric constant of the surrounding medium, thereby reducing capacitance between adjacent metal lines and improving signal transmission speed while allowing increased interconnection density for enhanced circuit functionality.

Inventive Principle:
Principle #29Pneumatics and hydraulics

3Reliability

If via-induced-metal-bridge (VIMB) issues are addressed by increasing isolation, then manufacturing precision requirements increase

Engineering Contradiction:
ImproveVIMB performanceVSAvoidisolation structure precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The isolation structure employs local quality by applying different dielectric materials with distinct properties in different regions: the first dielectric layer provides general insulation, while the second dielectric layer specifically creates air-gaps at critical interfaces between metal interconnections. This localized differentiation of dielectric properties enhances VIMB performance without requiring uniform high-precision isolation throughout the entire structure, thereby reducing overall manufacturing precision requirements.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10109519B2Method of semiconductor integrated circuit fabrication
Publication Date: 2018.10.23 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10109519B2 patent drawing
  • US10109519B2 patent drawing
  • US10109519B2 patent drawing

AI summary

A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A conductive feature over a substrate is provided. A first dielectric layer is deposited over the conductive feature and the substrate. A via-forming-trench (VFT) is formed in the first dielectric layer to expose the conductive feature and the substrate around the conductive feature. The VFT is filled in by a sacrificial layer. A via-opening is formed in the sacrificial layer to expose the conductive feature. A metal plug is formed in the via-opening to connect to the conductive feature. The sacrificial layer is removed to form a surrounding-vacancy around metal plug and the conductive feature. A second dielectric layer is deposited over the substrate to seal a portion of the surrounding-vacancy to form an enclosure-air-gap all around the metal plug and the conductive feature.