Semiconductor Device Air Gap Multilayer Wiring Capacitance Reduction
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Solution Overview
Problem
Existing semiconductor devices face challenges in reducing wiring delays due to increasing wiring resistance and capacitance between lines, which affects operation speed, and previous methods to lower dielectric constants have not been effective in maintaining mechanical strength and reliability.
Innovation Solution
A semiconductor device design featuring a multilayer wiring layer with alternately stacked interlayer films and diffusion preventing films, a contact via penetrating the via insulating layer, a through hole in the diffusion preventing films, and an air gap connected to the through hole to expose the contact via, reducing capacitance while maintaining mechanical strength and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an insulating film between wiring lines is removed to form an air gap structure, then the dielectric constant is lowered and capacitance between wiring lines is reduced, but thin films protruding into the air gap may collapse and mechanical strength decreases
Solution Approach 1:
The patent divides the insulating film removal process into segments: only specific interlayer films are removed to form air gaps, while other interlayer films and the via insulating layer remain intact. This selective segmentation maintains structural support in critical areas while achieving capacitance reduction in wiring regions, resolving the contradiction between lowering dielectric constant and maintaining mechanical strength.
Solution Approach 2:
The patent applies local quality by creating air gaps only in specific regions where capacitance reduction is most beneficial, while maintaining solid insulating film structures in areas requiring mechanical support. The via insulating layer and certain interlayer films are preserved locally to provide structural reinforcement, preventing thin film collapse while achieving the desired electrical performance improvement.
2Speed
If air gaps are formed to reduce capacitance, then operation speed improves, but the mechanical strength of the entire semiconductor device decreases
Solution Approach 1:
The patent segments the air gap formation to occur only in specific interlayer films rather than throughout the entire device structure. By removing insulating films selectively between wiring lines while preserving the via insulating layer and other structural films, the patent achieves capacitance reduction for speed improvement while maintaining overall mechanical integrity through preserved structural elements.
Solution Approach 2:
The patent creates a composite structure combining air gap regions (for electrical performance) with solid insulating film regions (for mechanical strength). This composite architecture allows different portions of the device to have optimized properties: air gaps provide low dielectric constant for faster operation, while remaining solid films provide mechanical support, resolving the speed-strength contradiction.
Data Source
AI summary
To reduce the capacitance between wiring lines of a semiconductor device, while maintaining mechanical strength and reliability. A semiconductor device including: a multilayer wiring layer in which a plurality of interlayer films and a plurality of diffusion preventing films are alternately stacked, and a wiring line is formed in the interlayer films; a contact via that penetrates a via insulating layer formed on one surface of the multilayer wiring layer, and is electrically connected to the wiring line of the multilayer wiring layer; a through hole that penetrates at least one of the interlayer films and the diffusion preventing films from the other surface of the multilayer wiring layer on the opposite side from the one surface; and an air gap that is connected to the through hole, and is formed in at least one of the interlayer films, to expose the contact via.