Semiconductor Air Gaps Reduce Parasitic Capacitance

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Solution Overview

Problem

As semiconductor devices integrate more densely, parasitic capacitance increases due to the proximity of conductive structures, limiting performance, and existing methods to reduce capacitance by lowering the dielectric constant of insulating materials are insufficient.

Innovation Solution

Incorporating a semiconductor device design with air gaps and capping support layers surrounding contact plugs, where the air gaps and capping support layers have a ring-shaped structure, allowing for increased width and volume, thereby reducing parasitic capacitance and facilitating the capping process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the distance between adjacent conductive structures is reduced to increase integration density, then the degree of integration is improved, but parasitic capacitance increases

Engineering Contradiction:
Improvedegree of integrationVSAvoidparasitic capacitance
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent extracts the harmful dielectric material between the bit line and contact plug, replacing it with air gaps. This removal of the insulating material that causes parasitic capacitance directly addresses the harmful effect while maintaining the reduced distance between conductive structures for high integration density.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the dielectric constant parameter by introducing air gaps (dielectric constant ≈ 1) instead of traditional insulating materials (dielectric constant > 3). This parameter change significantly reduces parasitic capacitance while allowing adjacent conductive structures to remain in close proximity for high integration density.

Inventive Principle:
Principle #35Parameter changes

2Object-generated harmful factors

If the dielectric constant of insulating material is lowered to reduce parasitic capacitance, then parasitic capacitance is reduced, but the reduction is limited due to high dielectric constants of available insulating materials

Engineering Contradiction:
Improveparasitic capacitanceVSAvoidreduction limit
Core Design Contradiction:
Object-generated harmful factorsVSAdaptability or versatility

Solution Approach 1:

The patent uses air (a gas) to fill the space between conductive structures instead of solid insulating materials. This pneumatic approach achieves a dielectric constant of approximately 1, which is the lowest possible value, thereby maximizing parasitic capacitance reduction beyond what solid insulating materials can achieve.

Inventive Principle:
Principle #29Pneumatics and hydraulics

Solution Approach 2:

The patent introduces porous air gaps between the bit line and contact plug. These air-filled pores provide excellent electrical insulation with minimal dielectric constant, achieving superior parasitic capacitance reduction compared to solid insulating materials while maintaining structural integrity through the porous configuration.

Inventive Principle:
Principle #31Porous materials

3Object-generated harmful factors

If air gaps are introduced to reduce parasitic capacitance, then parasitic capacitance is reduced, but the capping process becomes more difficult

Engineering Contradiction:
Improveparasitic capacitanceVSAvoidcapping process difficulty
Core Design Contradiction:
Object-generated harmful factorsVSEase of manufacture

Solution Approach 1:

The patent segments the air gap structure into multiple controlled regions with defined geometries. By dividing the air gap formation into discrete steps using sacrificial spacers and support layers, the capping process becomes more manageable and controllable, reducing manufacturing difficulty while maintaining the parasitic capacitance reduction benefit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces sacrificial spacers and capping support layers as intermediary structures during fabrication. These temporary intermediaries define and protect the air gap regions during the capping process, making it easier to cap the device without collapsing or filling the air gaps, thereby reducing manufacturing difficulty.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9627253B2Semiconductor device including air gaps and method of fabricating the same
Publication Date: 2017.04.18 SK HYNIX INC
  • US9627253B2 patent drawing
  • US9627253B2 patent drawing
  • US9627253B2 patent drawing

AI summary

A semiconductor device including air gaps and a method of fabricating the same. The semiconductor device in accordance with an embodiment may include a bit line structure having a bit line formed over a first contact plug, a second contact plug formed adjacent to the first contact plug and the bit line structure, an air gap structure comprising two or more air gaps to surround the second contact plug and have an outer sidewall in contact with the bit line structure, and one or more capping support layers separating the air gaps, a third contact plug capping a part of the air gap structure and being formed over the second contact plug, and a capping layer for capping a remainder of the air gap structure.