Semiconductor Air Spaces Separate Conductive Structures
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Solution Overview
Problem
As semiconductor devices become more densely integrated, the reduced distance between interconnection lines and contact plugs leads to increased load capacitance, which can degrade operating speed and refresh characteristics.
Innovation Solution
The implementation of semiconductor devices with conductive patterns and lines separated by asymmetric air spaces of varying widths, where the air spaces are formed by removing sacrificial spacers, allowing for different thicknesses and uniformity of insulating layers, effectively managing the distance between conductive structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the distance between interconnection lines and contact plugs is reduced to increase integration density, then the integration density is improved, but the load capacitance increases and operating speed deteriorates
Solution Approach 1:
The patent applies asymmetry by forming air spaces of different widths on opposite sides of the conductive pattern. The first air space has a different width than the second air space, allowing asymmetric management of capacitance and spacing. This asymmetric configuration enables optimization of the distance between conductive structures while maintaining integration density, thereby resolving the contradiction between high integration density and low load capacitance.
Solution Approach 2:
The patent applies local quality by creating non-uniform air space widths at different locations. The air spaces can have uniform or non-uniform widths, with different thicknesses of insulating layers on different sides. This localized variation in spacing and insulation allows different regions to be optimized for their specific electrical requirements, enabling high integration density while controlling load capacitance in critical areas.
2Productivity
If the distance between interconnection lines and contact plugs is reduced to increase integration density, then the integration density is improved, but the load capacitance increases
Solution Approach 1:
The asymmetric air space configuration allows different spacing on opposite sides of the conductive pattern, enabling optimization of capacitance management in high-density integration while maintaining necessary electrical isolation.
Solution Approach 2:
The air spaces act as intermediary regions between the conductive pattern and the insulating layers. These air spaces provide electrical isolation and control the capacitance between adjacent conductive structures, enabling high integration density while managing load capacitance through the intermediate air space region.
3Speed
If asymmetric air spaces with different widths are formed to reduce load capacitance, then the operating speed is improved, but the device complexity increases
Solution Approach 1:
The air spaces are formed by removing sacrificial spacers that were previously deposited during the manufacturing process. This preliminary action of forming and then removing the sacrificial spacers creates the asymmetric air space configuration without requiring complex direct patterning steps, thereby reducing the overall process complexity while achieving the desired asymmetric structure for improved operating speed.
Solution Approach 2:
The asymmetric air space configuration changes the physical parameters of the device structure. By controlling the widths and positions of the air spaces, the electrical parameters such as capacitance and signal transmission characteristics are optimized, improving operating speed while the parameter changes are achieved through controlled material removal rather than complex assembly.
Data Source
AI summary
A semiconductor device includes a substrate, a conductive pattern (e.g., a contact plug) on an active region of the substrate and having respective first and second sidewalls on opposite first and second sides of the conductive pattern, and first and second conductive lines (e.g., bit lines) on the substrate on respective ones of the first and second sides of conductive pattern and separated from the respective first and second sidewalls by asymmetric first and second air spaces.