Semiconductor Align Mark Protection During CMP

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Solution Overview

Problem

As semiconductor device elements are miniaturized, it becomes challenging to form them without damage, particularly due to issues with align marks in photolithography processes, which can lower yield.

Innovation Solution

A method involving forming pattern structures on a substrate, creating gap fill layers, fences, and contact structures, using a second pattern structure as an align mark for photolithography, and etching an upper conductive layer to form conductive patterns while ensuring the second pattern structure's integrity is maintained to prevent damage during chemical mechanical polishing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If element sizes are reduced to increase integration, then device integration is improved, but the risk of damage during manufacturing increases

Engineering Contradiction:

Improvedevice integrationVSAvoidelement damage risk

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The method performs preliminary protective actions by forming a capping layer over the align mark pattern structure before subsequent CMP processes. This capping layer is formed in advance to prevent damage to the align mark during later manufacturing steps, allowing the use of fragile, miniaturized elements without compromising their integrity.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The capping layer acts as an intermediary protective structure between the align mark pattern structure and the CMP process. This intermediate layer absorbs the mechanical stress and abrasion from CMP, preventing direct contact and potential damage to the delicate align mark features while still allowing the CMP process to proceed for planarizing other structures.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If align mark damage occurs during CMP, then photolithography yield is reduced, but the manufacturing process continues

Engineering Contradiction:

Improvemanufacturing continuityVSAvoidphotolithography yield

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

The capping layer is formed preliminarily over the align mark structure before CMP processing. This preliminary protective measure ensures that when CMP is performed later in the process, the align mark remains intact, thereby maintaining photolithography yield without interrupting manufacturing continuity.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The capping layer provides beforehand cushioning protection to the align mark pattern structure against the harmful mechanical forces of CMP. By placing this protective layer in advance, the align mark is cushioned from direct exposure to abrasive particles and downforce, preventing damage that would otherwise reduce photolithography yield.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

3Reliability

If a capping layer is formed to protect the align mark, then align mark integrity is improved, but process complexity increases

Engineering Contradiction:

Improvealign mark integrityVSAvoidprocess steps

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The capping layer formation process is integrated with existing manufacturing steps and serves multiple functions: it protects the align mark during CMP, provides a planar surface for subsequent processing, and can serve as an etch stop layer. By making the capping layer multi-functional, the additional process step justifies itself through multiple benefits rather than being a single-purpose addition.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The method merges the capping layer formation with other protective and structural measures in a coordinated sequence. The capping layer is combined with the align mark pattern structure and subsequent CMP protection strategies into an integrated approach, reducing the need for separate, standalone protective measures and thereby limiting overall process complexity increase.

Inventive Principle:

Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the yield of photolithography processes by protecting the second pattern structure from damage during CMP, allowing for precise and reliable formation of semiconductor devices with improved integration and reduced defects.

Implementation Method 1

chemical mechanical polishing processes

Methodology Applied

Scientific EffectChemical mechanical polishing:

Data Source

PatentUS11581318B2Methods of manufacturing semiconductor devices

Publication Date: 2023.02.14 SAMSUNG ELECTRONICS CO LTD

AI summary

A method of manufacturing a semiconductor device includes forming a first pattern structure having a first opening and a second pattern structure having a second opening on a substrate, forming a gap fill layer in the second opening, forming fences and contact structures in the first opening, removing the gap fill layer in the second opening, forming an upper conductive layer to cover the first and second pattern structures, the fences, and the contact structures, forming a mask pattern based on a photolithography process using the second pattern structure covered by the upper conductive layer as an align mark, and etching the upper conductive layer using the mask pattern to form upper conductive patterns. A width of the second opening is larger than a width of a first opening. A thickness of the upper conductive layer is smaller than a depth of the second opening.