Semiconductor Chip Alignment Verification via Differentiated Contact

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Solution Overview

Problem

During the production of complex semiconductor components, achieving reliable electrical connections between semiconductor chips requires precise alignment of their contacts, as inadequate alignment can lead to weak connections and reliability risks.

Innovation Solution

The semiconductor chip design incorporates a mounting surface with a plurality of first conductive contacts arranged in a regular pattern and at least one second conductive contact that differs in lateral extent or position, allowing for improved alignment checking by assessing electrical connections between these contacts when joined with another chip.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If contacts are arranged in a regular pattern on semiconductor chips, then manufacturing and alignment are simplified, but alignment precision cannot be verified

Engineering Contradiction:
Improvecontact arrangement simplicityVSAvoidalignment verification capability
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The patent applies local quality by introducing a second contact with different lateral extent or position among otherwise identical first contacts arranged in a regular pattern. This local differentiation creates a detectable feature that enables alignment verification without disrupting the overall regular arrangement that simplifies manufacturing.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses the second contact as a reference copy with known positional or dimensional characteristics. By comparing the position or size of this reference contact against the regular pattern of first contacts, the system can verify alignment precision while maintaining the simplicity of the regular contact arrangement.

Inventive Principle:
Principle #26Copying

2Measurement precision

If alignment checking features are added to semiconductor chips, then alignment precision can be verified, but device complexity increases

Engineering Contradiction:
Improvealignment verification capabilityVSAvoidcontact arrangement complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Instead of adding multiple alignment features throughout the chip, the patent introduces only a single second contact with differentiated characteristics among the regular first contacts. This minimal local modification provides alignment verification capability while keeping the overall device complexity low.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The second contact serves multiple functions: it maintains electrical connection functionality like the first contacts while simultaneously serving as an alignment reference feature. This multi-functionality eliminates the need for separate dedicated alignment markers, thereby avoiding increased device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If a second contact with different lateral extent or position is introduced, then alignment can be checked, but contact pattern regularity is disrupted

Engineering Contradiction:
Improvealignment verification capabilityVSAvoidcontact pattern regularity
Core Design Contradiction:
Measurement precisionVSStability of the object's composition

Solution Approach 1:

The patent disrupts contact pattern regularity only locally by introducing a single second contact with different lateral extent or position, while maintaining the regular pattern for all other first contacts. This localized disruption provides sufficient alignment verification capability without significantly affecting the overall stability and predictability of the contact pattern composition.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11728257B2Semiconductor chip comprising a multiplicity of external contacts, chip arrangement and method for checking an alignment of a position of a semiconductor chip
Publication Date: 2023.08.15 INFINEON TECHNOLOGIES AG
  • US11728257B2 patent drawing
  • US11728257B2 patent drawing
  • US11728257B2 patent drawing

AI summary

A semiconductor chip includes a mounting surface having a plurality of first conductive contacts and a second conductive contact, wherein each of the first contacts in the plurality is arranged in a regularly spaced apart array such that centroids of immediately adjacent ones of the first contacts are separated from one another in a first direction by a first distance, each of the first contacts in the plurality have an identical first lateral extent, and the second conductive contact is arranged between two of the first conductive contacts in the first direction such that first and second distances between the at least one second conductive contact and the two of the first conductive contacts are each less than the first distance.