Semiconductor Power Device Alignment Interconnect Structure
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Solution Overview
Problem
Existing methods for assembling semiconductor power devices are not accurate enough in aligning substrates in the x and y dimensions, leading to potential misalignment and non-optimal electrical connections.
Innovation Solution
The use of alignment interconnect elements and receiving elements with specific shapes and sizes to ensure precise alignment of substrates, where the alignment interconnect elements are partially received by the receiving elements, fixing the relative position of the substrates and patterns of electrically conductive layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If visible alignment markers with cameras and actuators are used to align substrates, then alignment can be performed, but the alignment precision is insufficient and substrates may move before fastening
Solution Approach 1:
The patent replaces the mechanical alignment system (cameras, actuators, visual markers) with a geometric constraint system. Alignment interconnect elements with specific shapes (e.g., spherical, cylindrical) are partially received by corresponding receiving elements (e.g., holes, recesses) on substrates, creating automatic mechanical constraints that prevent substrate movement in x, y, and z dimensions without requiring active measurement or control systems.
Solution Approach 2:
The alignment interconnect elements and receiving elements are designed to automatically self-align the substrates through their geometric shapes. When the interconnect element is inserted into the receiving element, the specific geometry (such as a sphere in a hole or cylinder in a recess) automatically constrains the relative position of substrates without requiring external alignment equipment or complex control algorithms.
2Reliability
If copper balls or drop-shaped elements are used to provide spacing and electrical connection, then electrical connection is achieved, but substrate alignment in x and y dimensions is not accurate enough
Solution Approach 1:
The patent employs asymmetric geometric shapes for the alignment interconnect elements and receiving elements. For example, a spherical interconnect element with a specific diameter is designed to fit into a hole of a specific size, creating an asymmetric constraint that automatically defines the relative position of substrates in both x and y dimensions, going beyond the simple spacing function of symmetric copper balls.
Solution Approach 2:
The patent extends the alignment function from the z-dimension (spacing) to include x and y dimensions through the geometric design of interconnect elements. By giving the interconnect elements specific shapes (spherical, cylindrical, conical) and designing corresponding receiving elements, the system adds positional constraint dimensions that automatically align substrates in all three spatial dimensions simultaneously.
Data Source
AI summary
Some embodiments are directed to a semiconductor power device and a method of assembling such a device is provided. The semiconductor power device includes a first substrate, a second substrate and an interconnect structure. The first substrate includes a switching semiconductor element, a first electrically conductive layer(s) and a first receiving element. The second substrate includes a second receiving element and a second electrically conductive layer(s). The interconnect structure provides an electrical connection between the first electrically conductive layer and the second electrically conductive layer. The interconnect structure further includes a plurality of interconnect elements of an electrical conductive material. At least one of the plurality of interconnect elements is an alignment interconnect element. The alignment interconnect element is partially received by the first receiving element and is partially received by the second receiving element for aligning a relative position of the first substrate with respect to the second substrate.