Semiconductor Alignment Mark for 3D Stack Backside TSV
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Solution Overview
Problem
The existing 3D multilayer semiconductor stack packages face challenges with insufficient wiring space, leading to misalignment issues during the backside alignment process, which affects the formation and electrical connection of through silicon vias (TSVs) due to the complexity and cost of lithography-based alignment methods.
Innovation Solution
The use of laser-formed alignment marks within the semiconductor substrates simplifies the backside alignment process by creating self-aligning keys that reduce processing steps and costs, improving accuracy and enabling reliable electrical connections between chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If lithography process is used for backside alignment, then alignment can be performed, but processing steps are complex and cost is high
Solution Approach 1:
The patent extracts the alignment function from the complex lithography process by forming dedicated alignment marks (first and second alignment marks) in the scribe line regions of the semiconductor substrates. These alignment marks serve as reference features that can be detected and used for alignment without requiring the full lithography alignment sequence, thereby simplifying the overall alignment process while maintaining accuracy.
Solution Approach 2:
The alignment marks act as intermediary reference features between the two semiconductor substrates. By providing detectable alignment marks in the scribe line regions, the system creates intermediate reference points that facilitate the alignment process, eliminating the need for direct complex lithography-based alignment between substrates.
2Manufacturing precision
If lithography process is used for backside alignment, then alignment can be performed, but processing cost increases
Solution Approach 1:
The patent extracts the alignment function from the complex lithography process by forming dedicated alignment marks (first and second alignment marks) in the scribe line regions of the semiconductor substrates. These alignment marks serve as reference features that can be detected and used for alignment without requiring the full lithography alignment sequence, thereby simplifying the overall alignment process while maintaining accuracy.
Solution Approach 2:
The alignment marks are formed using simple laser irradiation rather than expensive lithography processes. These alignment marks serve their purpose as reference features and can be created with low-cost, straightforward processing methods, reducing the overall manufacturing cost while achieving the necessary alignment functionality.
3Length of moving object
If via last from backside process is used, then via pitch can be reduced, but misalignment occurs between backside portion and frontside pad
Solution Approach 1:
The patent forms alignment marks in the scribe line regions of both semiconductor substrates before the bonding process. These pre-formed alignment marks serve as reference features that enable accurate alignment during the bonding process, preventing misalignment between the backside portion and frontside pad that would otherwise occur in via last from backside processes.
Solution Approach 2:
The patent replaces complex mechanical alignment systems with optical detection of alignment marks. By using detectable alignment marks formed by laser irradiation, the system substitutes mechanical alignment methods with optical field-based detection, achieving higher precision alignment without the complexity of mechanical alignment systems.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances alignment accuracy, reduces processing time and costs, and ensures proper electrical connection of TSVs, thereby improving the reliability and efficiency of semiconductor package formation.
Implementation Method 1
forming a first alignment mark in the semiconductor substrate and in the scribe line region so as to be spaced apart from a first surface of the semiconductor substrate by irradiating the scribe line region with beams
Data Source
AI summary
Semiconductor devices and methods for manufacturing a semiconductor device include a first semiconductor substrate in which a first scribe line region and a first chip region are defined, a first alignment mark inside the first semiconductor substrate and in the first scribe line region so as to be spaced apart from an upper side of the first semiconductor substrate, a second semiconductor substrate on the first semiconductor substrate and in which a second scribe line region and a second chip region are defined, and a second alignment mark inside the second semiconductor substrate and in the second scribe line region so as to be spaced apart from an upper side of the second semiconductor substrate, wherein the second semiconductor substrate is on the first semiconductor substrate so that positions of the first alignment mark and the second alignment mark correspond to each other.