Semiconductor Die Alignment Test Pads and Switch Controller

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Solution Overview

Problem

The challenge in semiconductor manufacturing lies in accurately aligning semiconductor dies or wafers for successful coupling, which is crucial for effective communication and yield, as misalignment leads to defective devices and decreased yield.

Innovation Solution

The implementation of semiconductor dies and wafers with pads that support a test operation for determining alignment accuracy, using test signal generators and receivers, and switch controllers to ensure precise alignment and communication between pads and internal circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If semiconductor dies or wafers are coupled without alignment test operations, then the manufacturing process is simpler and faster, but the alignment accuracy decreases leading to defective devices

Engineering Contradiction:
Improvealignment accuracyVSAvoidtest operation complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent implements test operations before final coupling to determine alignment accuracy. The pads are configured to perform alignment tests in advance, allowing misalignment to be detected and corrected before permanent coupling occurs, thus ensuring high alignment accuracy without compromising process efficiency

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces special test pads as intermediary elements between the alignment system and the actual coupling process. These test pads serve as mediators that enable alignment verification without requiring complex external measurement equipment, simplifying the overall system while maintaining high precision

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If alignment test operations are implemented, then the coupling accuracy improves, but the manufacturing time and process complexity increase

Engineering Contradiction:
Improvecoupling reliabilityVSAvoidmanufacturing cycle time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges the alignment test function with the existing pad structure used for signal transmission. By combining these functions into a single integrated pad design, the system achieves high coupling reliability without requiring separate test operations that would extend manufacturing cycle time

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The pads are designed to perform self-testing for alignment verification. The test signal generator and test signal receiver work with the pads to automatically determine alignment accuracy without requiring external intervention or additional manufacturing steps, thus maintaining fast production cycles while ensuring reliable coupling

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11227815B2Semiconductor die, semiconductor wafer, semiconductor device including the semiconductor die and method of manufacturing the semiconductor device
Publication Date: 2022.01.18 SAMSUNG ELECTRONICS CO LTD
  • US11227815B2 patent drawing
  • US11227815B2 patent drawing
  • US11227815B2 patent drawing

AI summary

A semiconductor die includes first pads, switches that are electrically connected with the first pads, respectively, a test signal generator that generates test signals and to transmit the test signals to the switches, internal circuits that receive first signals through the first pads and the switches, to perform operations based on the first signals, and to output second signals through the switches and the first pads based on a result of the operations, and a switch controller that controls the switches so that the first pads communicate with the test signal generator during a test operation and that the first pads communicate with the internal circuits after a completion of the test operation.