Semiconductor Device with ALD Insulator for Oxygen Diffusion Control

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Solution Overview

Problem

The challenge lies in developing semiconductor devices with miniaturized and highly integrated transistors that exhibit good electrical characteristics, low off-state current, high on-state current, low power consumption, and high reliability, while also enabling long data retention and high-speed data writing with flexible design and manufacturing productivity.

Innovation Solution

The semiconductor device incorporates an oxide semiconductor transistor with strategically positioned insulators deposited using atomic layer deposition (ALD) to prevent oxygen diffusion and impurity entry, featuring a complex layered structure with specific angles and rounded corners to enhance electrical performance and miniaturization, and utilizes conductive oxides to reduce parasitic capacitance and oxidation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Weight of moving object

If transistors are miniaturized and highly integrated to reduce size and weight of electronic devices, then device size and weight are reduced, but electrical characteristics deteriorate and manufacturing precision requirements increase

Engineering Contradiction:
Improveweight of electronic devicesVSAvoidelectrical characteristics
Core Design Contradiction:
Weight of moving objectVSReliability

Solution Approach 1:

The patent applies local quality by forming an insulator layer specifically at the side surface of the gate insulating film where oxygen diffusion occurs, rather than uniformly throughout the entire device. This localized insulation treatment addresses the specific problem of oxygen diffusion at critical interfaces while maintaining overall device miniaturization and electrical performance

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The insulator layer acts as an intermediary barrier between the gate insulating film and the external environment, preventing oxygen diffusion and impurity entry. This intermediate layer resolves the contradiction by providing protective functionality without adding significant device size, thus maintaining miniaturization while improving electrical characteristics

Inventive Principle:
Principle #24Intermediary (Mediator)

2Length of moving object

If process rule is decreased to 45 nm, 32 nm, and 22 nm for transistor miniaturization, then device size is reduced, but manufacturing precision and electrical characteristics become more difficult to control

Engineering Contradiction:
Improvetransistor sizeVSAvoidfabrication precision
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

The insulator layer is formed in advance on the side surface of the gate insulating film before subsequent processing steps. This preliminary action prevents oxygen diffusion and impurity entry during miniaturization fabrication processes, ensuring manufacturing precision is maintained even as transistor dimensions are reduced to 45 nm, 32 nm, and 22 nm

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the physical and chemical parameters of the gate insulating film interface by introducing an insulator layer with specific properties (deposited by ALD method, specific thickness range). This parameter change enables precise control of oxygen diffusion and impurity entry, maintaining manufacturing precision during transistor miniaturization

Inventive Principle:
Principle #35Parameter changes

3Reliability

If insulators are deposited by ALD method to prevent oxygen diffusion and impurity entry, then reliability is improved, but device complexity and manufacturing steps increase

Engineering Contradiction:
Improvedevice reliabilityVSAvoidstructural complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The insulator is deposited specifically at the side surface of the gate insulating film where oxygen diffusion and impurity entry are most problematic, rather than applying insulation uniformly throughout the entire device structure. This localized approach improves reliability while minimizing added structural complexity

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The insulator layer serves multiple functions simultaneously: it prevents oxygen diffusion, blocks impurity entry, and provides interface protection. This multi-functionality improves device reliability without proportionally increasing structural complexity, as a single layer accomplishes multiple protective roles

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a semiconductor device with improved electrical characteristics, reduced power consumption, and increased reliability, enabling high-speed data writing and long data retention, while allowing for miniaturization and high productivity in manufacturing.

Implementation Method 1

The insulators are preferably deposited by an atomic layer deposition (ALD) method

Methodology Applied
Scientific EffectAtomic layer deposition: Chemical Vapour Deposition

Data Source

PatentUS10147681B2Semiconductor device and manufacturing method thereof
Publication Date: 2018.12.04 SEMICON ENERGY LAB CO LTD
  • US10147681B2 patent drawing
  • US10147681B2 patent drawing
  • US10147681B2 patent drawing

AI summary

A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first insulator over a substrate; an oxide over the first insulator; a second insulator over the oxide; a first conductor over the second insulator; a third insulator over the first conductor; a fourth insulator in contact with a side surface of the second insulator, a side surface of the first conductor, and a side surface of the third insulator; a fifth insulator in contact with a top surface of the oxide and a side surface of the fourth insulator; and a second conductor in contact with the top surface of the oxide and the fifth insulator. The level of the top surface of the fourth insulator is higher than the level of the top surface of the fifth insulator.