Semiconductor Contact Resistance via Localized Alloying
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Solution Overview
Problem
The scaling down of MOSFETs in semiconductor devices leads to a short channel effect, deteriorating the operating characteristics of semiconductor devices, necessitating the development of semiconductor devices capable of overcoming integration limitations and improving performance.
Innovation Solution
A semiconductor device is manufactured with a substrate featuring first and second source/drain regions, each with a distinct semiconductor alloyed with different metals, and the use of sacrificial patterns and oxidation processes to form etch-selective mask patterns, simplifying the manufacturing process and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If MOSFET sizes are continuously scaled down to increase integration density, then device integration density improves, but short channel effects deteriorate operating characteristics
Solution Approach 1:
The patent applies different semiconductor materials with different bandgaps to different regions of the channel. Specifically, a first semiconductor material with a first bandgap is used in a first region of the channel, while a second semiconductor material with a second bandgap is used in a second region. This local differentiation allows optimization of carrier transport in the channel while maintaining short channel effect control, thus resolving the contradiction between integration density and operating characteristics.
2Reliability
If different metals are used to alloy with different semiconductors in source/drain regions, then contact resistance is reduced, but manufacturing process complexity increases
Solution Approach 1:
The patent employs different metal alloys tailored to specific semiconductor regions. A first metal is alloyed with a first semiconductor in a first source/drain region, while a second metal is alloyed with a second semiconductor in a second source/drain region. This localized material optimization reduces contact resistance at each interface while the overall process remains manageable through systematic material selection.
Solution Approach 2:
The patent incorporates metal alloys into the source/drain regions during the epitaxial growth process, before subsequent manufacturing steps. By pre-alloying the metals with semiconductors during epitaxy, the contact resistance is optimized early in the process, and additional complex post-processing steps are avoided, thus reducing overall manufacturing complexity.
3Reliability
If multiple different metals and semiconductors are used in different source/drain regions, then device performance is improved, but manufacturing cost increases
Solution Approach 1:
The patent integrates multiple metal-semiconductor combinations into the source/drain regions during the epitaxial growth stage. By performing the alloying action preliminarily during epitaxy rather than through separate deposition and annealing steps, the number of manufacturing stages is reduced, equipment requirements are minimized, and overall manufacturing cost is lowered while maintaining high device performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the resistance of contact plugs connected to source/drain regions, improving the performance and efficiency of semiconductor devices by addressing the short channel effect and reducing manufacturing complexity and costs.
Implementation Method 1
the first ohmic contact pattern includes a first semiconductor alloyed with a first metal
Implementation Method 2
the second ohmic contact pattern includes a second semiconductor that is different than the first semiconductor and is alloyed with a second metal that is different than the first metal
Implementation Method 3
the use of sacrificial patterns and oxidation processes to form etch-selective mask patterns
Data Source
AI summary
A semiconductor device can include a substrate with a first source/drain and a second source/drain in the substrate. A first ohmic contact pattern can be in an uppermost surface of the first source/drain, where the first ohmic contact pattern includes a first semiconductor alloyed with a first metal. A second ohmic contact pattern can be in an uppermost surface of the second source/drain, where the second ohmic contact pattern includes a second semiconductor that is different than the first semiconductor and is alloyed with a second metal that is different than the first metal.


