Semiconductor Device Aluminum Wiring Planarization

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Solution Overview

Problem

The manufacturing of capacitance-detection type ultrasonic sensors using MEMS technology faces challenges with the reliability and yield due to issues with forming stable electrostatic variable capacitors, particularly with aluminum wiring, where insulating film deposition and planarization processes lead to short-circuiting, leakage, and disconnection problems, and the use of alternative methods like SOI substrates or Damascene wiring increases costs and complexity.

Innovation Solution

The solution involves forming a first metal film pattern on a semiconductor substrate, covering it with a first insulating film, removing the insulating film from the upper surface to expose the metal film pattern, and selectively removing any metal-containing deposits between the metal patterns to reduce the vertical step height without scratching, thereby improving the reliability and yield of the semiconductor device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If aluminum wiring is used for electrostatic variable capacitors, then manufacturing cost is reduced and process is simplified, but insulating film deposition and planarization lead to short-circuiting, leakage, and disconnection problems

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoiddevice reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

A planarization layer is introduced as an intermediary between the aluminum wiring and subsequent processing steps. This layer mediates the conflict by providing a flat surface for deposition while isolating the aluminum wiring from direct exposure to etching and deposition processes, thereby preventing short-circuits and disconnections while maintaining manufacturing simplicity

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The aluminum wiring is formed and planarized before subsequent electrode and insulating film deposition steps. This preliminary action establishes a stable, flat foundation that prevents later short-circuiting and leakage issues, allowing the manufacturing process to remain simple while ensuring device reliability

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If CMP process is used for planarization, then surface flatness is improved, but insulating film is removed from metal film upper surface and metal-containing deposits are generated

Engineering Contradiction:
Improvesurface flatnessVSAvoidmetal-containing deposits
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

A sacrificial insulating film layer is used that can be selectively removed by CMP without damaging the metal film. This disposable layer absorbs the mechanical stress of CMP, preventing metal film scratching while allowing subsequent removal of metal-containing deposits through chemical etching

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The metal-containing deposits generated during CMP are selectively extracted and removed through chemical etching processes. The etching solution specifically targets and removes these deposits without affecting the underlying metal film or insulating layers, thereby eliminating the harmful byproducts of planarization

Inventive Principle:
Principle #2Taking out (Extraction)

3Adaptability or versatility

If SOI substrate with U-shaped trenches is used to divide silicon substrate, then electrode division is achieved, but process complexity and manufacturing cost increase

Engineering Contradiction:
Improveelectrode division capabilityVSAvoidprocess complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Instead of physically dividing the silicon substrate using complex SOI structures, the invention uses planarized aluminum wiring patterns that replicate the electrode division function. The aluminum wiring is patterned to create separate electrode regions on a single flat substrate, achieving the same electrical isolation and functionality without the complex multi-layer SOI structure

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The mechanical division of the silicon substrate (U-shaped trenches) is replaced by a planar patterning approach using aluminum wiring and insulating films. This substitution eliminates the need for complex mechanical substrate modification while achieving the same electrode separation and control functionality

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Manufacturing precision

If insulating film is completely removed from metal film upper surface, then vertical step height is reduced, but metal film exposure leads to scratching and disconnection

Engineering Contradiction:
Improvevertical step heightVSAvoidmetal film integrity
Core Design Contradiction:
Manufacturing precisionVSStrength

Solution Approach 1:

The insulating film removal is applied locally rather than globally. The CMP process selectively removes the insulating film from areas where metal-containing deposits are present, while leaving the insulating film intact on the metal film upper surface. This localized approach reduces vertical step height without exposing the metal film to scratching or disconnection risks

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability and manufacturing yield of semiconductor devices by preventing leakage and disconnection issues, maintaining the desired insulating properties, and simplifying the manufacturing process while reducing costs.

Implementation Method 1

forming a first insulating film on the semiconductor substrate so as to cover the first metal film

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

removing the first insulating film on an upper surface of the first metal film pattern through etching carried out on the entire surface of the first insulating film

Methodology Applied
Scientific EffectEtching:

Implementation Method 3

removing a metal-containing deposit that has been deposited on the first insulating film which remains between the neighboring first metal film patterns

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS7754595B2Method for manufacturing semiconductor device
Publication Date: 2010.07.13 HITACHI LTD
  • US7754595B2 patent drawing
  • US7754595B2 patent drawing
  • US7754595B2 patent drawing

AI summary

An insulating film on a semiconductor substrate has a first titanium nitride film, an aluminum film, and a second titanium nitride film formed thereon, and an insulating film is formed so as to cover a lower electrode wiring. Then, the insulating film is dry-etched anisotropically so that the insulating film on the lower electrode wiring is removed, and a portion of the insulating film on the lower electrode wiring is left as a sidewall. A deposit deposited during the etching of the insulating film on the lower electrode wiring is removed by radical etching without using ion bombardment. The deposit contains Ti that is a metal element forming the second titanium nitride film. Subsequently, the second titanium nitride film is nitrided through ammonium plasma, and an insulating film to cover the lower electrode wiring is formed.