Semiconductor Process Amorphous Silicon Thickness Control
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Solution Overview
Problem
The conventional self-aligned silicide process in semiconductor manufacturing often results in nickel silicide lateral diffusion, leading to current leakage due to the formation of thicker amorphous silicon layers near the corner regions of shallow trench isolation structures, which increases diode leakage.
Innovation Solution
A semiconductor process that involves a surface treatment to form a thin and smooth buffer layer on the substrate before pre-amorphous implantation, followed by a second pre-amorphous implantation with a lower ion implant energy level, dosage, and angle, using ions like indium, nitrogen, silicon, or arsenic, to prevent the formation of thick amorphous silicon layers and subsequently minimize silicide layer thickness near the corner regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a single pre-amorphous implantation is performed, then nickel silicide lateral diffusion is prevented, but the process complexity increases and manufacturing precision is compromised
Solution Approach 1:
The patent segments the implantation process into two distinct steps with different energy levels and dosages. This segmentation provides better control over the amorphous layer thickness, particularly at corner regions, achieving superior manufacturing precision compared to a single implantation step.
Solution Approach 2:
The first pre-amorphous implantation creates an initial amorphous layer that serves as a foundation for the second implantation. This preliminary action prepares the substrate in a controlled manner, allowing the second lower-energy implantation to achieve precise thickness control without requiring excessive complexity in a single step.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents the formation of thick amorphous silicon layers and silicide layers near the corner regions, thereby minimizing diode leakage and improving the reliability of semiconductor devices.
Implementation Method 1
a pre-amorphous implantation (PAI) process is often carried out which implants indium or arsenic atoms into the surface of the silicon substrate
Implementation Method 2
A first pre-amorphous implantation is performed to the substrate... the ion implant energy level for the second pre-amorphous implantation is between 5 KeV to 10 KeV, for example
Data Source
AI summary
A semiconductor process is provided. The semiconductor process includes providing a substrate. Then, a surface treatment is performed to the substrate to form a buffer layer on the substrate. Next, a first pre-amorphous implantation is performed to the substrate.