Semiconductor Anomaly Drift Detection Using FFT Density Estimation
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Solution Overview
Problem
Existing methods for identifying defective semiconductor chips during wafer level testing are inefficient, as univariate measurements fail to detect all anomalies, leading to higher disposal costs in later manufacturing stages.
Innovation Solution
A method using a Fast Fourier Transform (FFT) to determine a core density estimator for data distributions of anomaly values, calculating a weighted area under the curve (WAUC) to detect drifts in data distributions, flagging ensembles for further inspection if the drift exceeds a predetermined threshold, and optionally triggering alarms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If univariate measurements are used in WLT, then the measurement process is simple and fast, but the anomaly detection capability is insufficient leading to defective chips passing through
Solution Approach 1:
The patent combines multiple univariate measurements into a multivariate analysis framework. By merging individual measurement results into a comprehensive anomaly score through statistical methods (z-score calculation, Mahalanobis distance), the system achieves superior anomaly detection capability while building upon simple, existing measurement techniques rather than replacing them with complex individual sensors.
Solution Approach 2:
The patent transitions from univariate (single-dimensional) measurements to multivariate (multi-dimensional) analysis by introducing additional statistical dimensions. Through methods like Mahalanobis distance and principal component analysis, the system adds dimensional depth to the measurement space, enabling detection of anomalies that manifest as patterns across multiple measurements rather than single extreme values.
2Measurement precision
If comprehensive multivariate analysis is performed on all chips, then anomaly detection accuracy improves, but computational resources and time consumption increase significantly
Solution Approach 1:
The patent implements a two-stage screening approach where not all chips undergo the same level of analysis. A first pass uses lighter computational methods to identify suspicious chips, and only those flagged anomalies undergo more intensive multivariate analysis. This partial application of comprehensive analysis maintains high detection accuracy for critical cases while reducing overall processing time for the entire chip population.
Solution Approach 2:
The patent segments the chip population into different risk categories based on initial screening results. By dividing the processing workflow into stages (initial filtering, detailed analysis, verification), the system applies computational resources selectively rather than uniformly, reducing total processing time while maintaining detection accuracy for high-risk segments.
3Reliability
If drift detection is performed continuously on data distributions, then production process changes are detected early, but computational load and resource consumption increase
Solution Approach 1:
The patent implements periodic drift detection at strategically chosen intervals rather than continuous monitoring. By performing distribution drift analysis at regular intervals (e.g., per wafer lot, per production batch) rather than continuously, the system maintains process monitoring reliability for detecting significant shifts while reducing computational energy consumption to manageable levels.
Solution Approach 2:
The patent employs adaptive thresholding where the system automatically adjusts monitoring sensitivity based on historical data and process stability. The drift detection mechanism uses self-adjusting control limits that reduce false alarms and minimize unnecessary computational analysis, allowing the system to maintain high reliability while consuming fewer resources during stable production periods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables fast, resource-efficient detection of anomalous semiconductor components, reducing false positives and enabling timely identification and sorting of defective chips, thus optimizing production quality testing.
Implementation Method 1
the data distribution fobs and/or the reference data distribution fref is determined approximately as a core density estimator in each case, wherein the core density estimator of the data distribution and/or the core density estimator of the reference data distribution is determined based on the frequency distribution of the respective anomaly values using an FFT (Fast Fourier Transform) method
Data Source
AI summary
A computer-implemented method is disclosed for production quality testing in component manufacturing, in particular semiconductor manufacturing, based on a detection of a drift of data points in a data distribution over a reference data distribution, wherein the two data distributions each includes frequency distributions of anomaly values in an ensemble of components or reference elements, wherein a drift detection value is obtained as a weighted area under the curve, i.e. by the product of at least the determined cumulative distribution function of the reference data distribution and the data distribution integrated over the range from the smallest occurring anomaly value to the largest occurring anomaly value, and the drift detection value is compared to a predetermined drift threshold value. If the drift detection value exceeds the drift threshold value, the ensembles of components are flagged for further checking. The data distribution and/or reference data distribution are approximately determined as core density estimators based on the frequency distribution of the respective anomaly values using an FFT-based method.