3D Antenna Feed Structure in Semiconductor Packages
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Solution Overview
Problem
Existing semiconductor device packages face challenges in designing antennas due to limitations in forming conductive structures with sufficient height and flexibility, which affect the performance and design of the antenna feeding lines.
Innovation Solution
A semiconductor device package is designed with a conductive structure that includes a conductive pillar covered by a dielectric layer, where the dielectric layer exposes a first surface with a different roughness than the second surface, allowing for the formation of an antenna feeding point, and a package body covers this structure to facilitate better antenna performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional planar conductive structure is used for antenna feeding, then the manufacturing process is simple, but the antenna performance and signal transmission are limited
Solution Approach 1:
The patent transitions from a conventional planar (2D) conductive structure to a three-dimensional (3D) conductive pillar structure. This dimensional change enables the conductive structure to extend vertically through multiple dielectric layers, providing better signal transmission paths and improved antenna performance while maintaining manageable manufacturing complexity through standard semiconductor fabrication techniques.
2Reliability
If the conductive structure height is increased to improve antenna performance, then the signal transmission is enhanced, but the manufacturing precision and alignment become more difficult
Solution Approach 1:
The patent segments the conductive structure into multiple discrete conductive pillars arranged in specific patterns (e.g., arrays). Each pillar can be independently formed and controlled, allowing for precise manufacturing through standard semiconductor processes. This segmentation enables height control and alignment precision to be managed at the individual pillar level rather than requiring monolithic precision across the entire structure.
Solution Approach 2:
The patent applies different properties to different parts of the conductive structure. The conductive pillars have specific height, diameter, and spacing characteristics optimized for signal transmission, while the surrounding dielectric layers provide insulation and mechanical support. This local optimization allows each component to be manufactured with appropriate precision for its specific function, improving overall manufacturing feasibility.
3Reliability
If a simple dielectric layer covering is used, then the manufacturing process is straightforward, but the antenna feeding point formation and signal isolation are insufficient
Solution Approach 1:
The patent implements a nested structure where conductive pillars are embedded within dielectric layers, which themselves are embedded within package bodies. Multiple dielectric layers with different properties are stacked and integrated, with each layer serving specific functions such as insulation, mechanical support, or signal routing. This nested arrangement provides effective signal isolation while maintaining a compact, integrated structure that can be manufactured through sequential fabrication steps.
Data Source
AI summary
A semiconductor device package includes a substrate, and interconnection structure and a package body. The interconnection structure is disposed on the substrate. The interconnection structure has a conductive structure and a first dielectric layer covering a portion of the conductive structure. The conductive structure defines an antenna feeding point. The package body is disposed on the substrate and covers the interconnection structure.