Semiconductor Antenna Integration on Dielectric Layers
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Solution Overview
Problem
Integrating antennas on a printed circuit board for millimeter wave applications is expensive, and existing semiconductor device packages lack efficient integration of RF functionality without increasing package size.
Innovation Solution
A semiconductor device package with a semiconductor chip, a redistribution layer, dielectric layers, and antennas integrated on the dielectric layer, allowing for electrically or electromagnetically coupled RF functionality without the need for additional antennas on the application board, using patch, dipole, or other planar antennas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If antennas are integrated on a printed circuit board, then RF functionality is achieved, but manufacturing cost increases
Solution Approach 1:
The patent merges the antenna structure with the semiconductor device package by integrating the antenna on the dielectric layer that is already part of the package structure. The antenna is formed using the same fabrication processes and materials (conductive layers, dielectric layers) as the semiconductor device, combining two separate functions (semiconductor processing and antenna fabrication) into a single integrated structure.
Solution Approach 2:
The dielectric layer and conductive layers serve multiple functions: they provide structural support for the semiconductor chip, enable electrical connections through redistribution layers, and simultaneously form the antenna structure for RF signal transmission and reception. This multi-functionality eliminates the need for separate antenna components and reduces overall manufacturing cost.
2Adaptability or versatility
If antennas are integrated on a printed circuit board, then RF functionality is achieved, but package size increases
Solution Approach 1:
The antenna is implemented as a planar structure on the dielectric layer, utilizing the two-dimensional surface area rather than requiring three-dimensional space. This planar integration allows the antenna to coexist with the semiconductor chip and other package components without significantly increasing the overall package footprint, as all elements are arranged in layers rather than requiring lateral expansion.
3Adaptability or versatility
If antennas are integrated on a printed circuit board, then RF functionality is achieved, but parasitic inductance and ohmic losses increase
Solution Approach 1:
The patent optimizes the antenna design by adjusting geometric parameters (trace width, trace length, spacing between traces) and material properties to minimize parasitic inductance and ohmic losses. The specific configuration of the conductive layers and dielectric materials is selected to achieve low loss at millimeter wave frequencies, directly addressing the energy loss issue through parameter optimization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables compact, cost-effective semiconductor devices with integrated RF functionality, reducing package size and cost, and providing excellent RF performance with low parasitic inductance and ohmic losses.
Implementation Method 1
For millimeter wave applications, antennas are used to transmit and receive radio frequency (RF) signals
Implementation Method 2
The dielectric layer is between the antenna and the semiconductor chip
Data Source
AI summary
A semiconductor device includes a semiconductor chip and a redistribution layer on a first side of the semiconductor chip. The redistribution layer is electrically coupled to the semiconductor chip. The semiconductor device includes a dielectric layer and an antenna on the dielectric layer. The dielectric layer is between the antenna and the semiconductor chip.