Semiconductor Aperture Formation via Preliminary Insulation

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Solution Overview

Problem

Conventional semiconductor device manufacturing methods face challenges with warpage in the support plate due to thermal stress, leading to reduced positioning accuracy of apertures and decreased yield, especially with the shrinking size of semiconductor elements requiring high mounting accuracy for small aperture formation.

Innovation Solution

The method involves forming insulation layers on semiconductor elements separately before mounting them on a support plate, reducing thermal stress and warpage effects, allowing for improved aperture accuracy and increased yield by eliminating the need for high precision in forming small apertures on the support plate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If an insulating resin is coated on the support plate and semiconductor elements after mounting, then the electrode parts are exposed through aperture formation, but warpage occurs in the support plate due to thermal stress and CTE difference, reducing aperture positioning accuracy

Engineering Contradiction:
Improveaperture positioning accuracyVSAvoidsupport plate flatness
Core Design Contradiction:
Manufacturing precisionVSStability of the object's composition

Solution Approach 1:

The patent applies preliminary action by forming the insulating resin coating and apertures on the semiconductor elements before mounting them on the support plate. This sequence prevents thermal stress-induced warpage of the support plate from occurring during the coating process, thereby maintaining aperture positioning accuracy. The support plate remains flat during the critical aperture formation process, eliminating the need for high-precision aperture formation on a warped surface.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If small apertures are formed to expose electrode parts on shrinking semiconductor elements, then mounting accuracy requirements increase, but this leads to reduced manufacturing yield due to difficulty in forming precise apertures

Engineering Contradiction:
Improveaperture size precisionVSAvoidsemiconductor manufacturing yield
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent performs aperture formation on semiconductor elements before mounting, when the elements are still on the flat semiconductor substrate. This preliminary action allows apertures to be formed with standard precision without requiring ultra-high mounting accuracy, thereby maintaining high manufacturing yield even as semiconductor elements shrink in size.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent inverts the conventional sequence by forming apertures on the semiconductor elements first, then mounting them on the support plate, rather than mounting first and then forming apertures. This inversion transfers the aperture formation process from the support plate environment to the semiconductor element environment, where standard precision tools and flat surfaces are available, thus maintaining high yield.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS8786110B2Semiconductor device and manufacturing method thereof
Publication Date: 2014.07.22 AMKOR TECH JAPAN INC
  • US8786110B2 patent drawing
  • US8786110B2 patent drawing
  • US8786110B2 patent drawing

AI summary

A semiconductor device comprising a support plate, a semiconductor element mounted on the support plate and including a circuit element surface having a plurality of first electrodes, a first insulation layer covering the circuit element surface of the semiconductor element, and including a plurality of first apertures exposing the plurality of first electrodes, a second insulation layer covering an upper part of the support plate and side parts of the semiconductor element, and wirings formed on an upper part of the first insulation layer and on an upper part of the second insulation layer, and electrically connected to the corresponding first electrodes.