Semiconductor Array Control Line Segmentation for Cell Isolation

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Solution Overview

Problem

In semiconductor arrays, as the dimensions shrink and the number of cells in a row increases, controlling electrons in word and source lines becomes challenging due to longer paths and smaller cross-sectional areas, leading to difficulties in read and write operations, and adjacent cells can be disturbed during addressing, affecting data integrity.

Innovation Solution

The semiconductor array is designed with control lines that extend over multiple columns and rows, allowing better electron flow and electrical control, with shared terminals between cells to reduce silicon area usage and minimize interference between cells during read/write operations by using distinct selection lines for each cell.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the number of cells in a row increases to improve memory density, then the area per cell decreases, but the control line path length increases leading to worse electrical control

Engineering Contradiction:
Improvearea per cellVSAvoidelectrical control
Core Design Contradiction:
Area of stationary objectVSEase of operation

Solution Approach 1:

The array is divided into multiple blocks, each with its own local control lines. This segmentation allows each block to be independently controlled with shorter control line paths, while the overall array achieves high density through the combined blocks. The control lines are segmented to serve specific blocks rather than spanning the entire array.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If control lines span longer paths to cover more cells, then fewer control lines are needed, but the resistance increases making cell control difficult

Engineering Contradiction:
Improvenumber of control linesVSAvoidcell control reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The array structure transitions from a simple planar arrangement to a blocked two-dimensional grid. Control lines are confined to operate within local blocks rather than spanning the entire array length. This dimensional reorganization of control authority allows adequate electrical control while managing the number of control lines through hierarchical organization.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Area of stationary object

If cells share terminals to reduce silicon area, then area efficiency improves, but adjacent cells can be disturbed during read/write operations

Engineering Contradiction:
Improvesilicon area usageVSAvoidcell interference
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The array is segmented into blocks where cells share terminals only within their local block, not across the entire array. This localized sharing maintains area efficiency while the block boundaries electrically isolate adjacent blocks, preventing disturbance propagation between non-selected cells in different blocks.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7817466B2Semiconductor array including a matrix of cells and a method of making a semiconductor array having a matrix of cells
Publication Date: 2010.10.19 NXP USA INC
  • US7817466B2 patent drawing
  • US7817466B2 patent drawing
  • US7817466B2 patent drawing

AI summary

A semiconductor array includes a matrix of cells, the matrix being arranged in rows and columns of cells, and a plurality of control lines. Each cell is coupled to a number of control lines allowing to select and read/write said cell. At least one of said control lines is coupled to cells of a plurality of columns and of at least two rows of the matrix.