Integrated Semiconductor Assembly With Additive Etch Resistance
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Solution Overview
Problem
Current NAND architecture and fabrication methods face challenges in preventing over-etching and galvanic corrosion during semiconductor material processing, which can lead to inefficient and unreliable memory device performance.
Innovation Solution
Incorporating additives such as carbon, sulfur, nitrogen, and oxygen into semiconductor materials at specific concentrations to enhance resistance to etchants like hot phosphoric acid, thereby preventing over-etching and reducing the risk of galvanic corrosion, and forming integrated assemblies with these modified materials in three-dimensional NAND architectures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional semiconductor materials are used during etching processes, then etching can proceed efficiently, but over-etching occurs leading to loss of semiconductor material and potential galvanic corrosion
Solution Approach 1:
An etch-stop layer is formed over the semiconductor material before the etching process begins. This layer acts as a pre-prepared protective barrier that prevents over-etching and galvanic corrosion during subsequent etching operations, allowing efficient etching while maintaining material integrity.
Solution Approach 2:
The etch-stop layer serves as an intermediary between the semiconductor material and the etchant. It selectively resists the etchant, allowing controlled etching of the semiconductor material while preventing the etchant from causing damage to the underlying material or causing galvanic corrosion.
2Productivity
If deep trenches are etched through multiple layers to form three-dimensional NAND structures, then device capacity increases, but the risk of over-etching and material loss increases
Solution Approach 1:
The etch-stop layer is formed in advance at a specific depth position before deep trench etching begins. This preliminary protective layer ensures that when etching through multiple layers to create deep trenches for high-capacity three-dimensional NAND structures, the etching process will stop at the predetermined depth, preventing over-etching and maintaining precise depth control.
Solution Approach 2:
The etch-stop layer provides localized protection at the trench bottom where it is most needed. This allows deep trenches to be etched with high precision for increased device capacity, while the etch-stop layer locally prevents further etching and material loss at the critical interface region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The incorporation of these additives significantly reduces the risk of over-etching and galvanic corrosion, improving the reliability and efficiency of NAND memory device fabrication by maintaining the integrity of semiconductor materials during processing.
Implementation Method 1
additive is incorporated into semiconductor material to reduce a rate of removal of such semiconductor material upon exposure to etchant
Implementation Method 2
The sacrificial material is removed with an etchant to leave openings
Data Source
AI summary
Some embodiments include an integrated assembly having a first structure containing semiconductor material, and having a second structure contacting the first structure. The first structure has a composition along an interface with the second structure. The composition includes additive to a concentration within a range of from about 1018 atoms/cm3 to about 1021 atoms/cm3. The additive includes one or more of carbon, oxygen, nitrogen and sulfur. Some embodiments include methods of forming integrated assemblies.


