Semiconductor Device Asymmetric Chip Orientation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor devices with identical semiconductor chips in different orientations face challenges in implementing switching functions and preventing reverse currents due to complex terminal coupling requirements, which complicates manufacturing and increases the size of the device.
Innovation Solution
A semiconductor device design featuring two identical semiconductor chips with transistors and diodes coupled in parallel, where the sources and gates are externally coupled, along with lead frames and terminals, to facilitate switching functions and reverse current prevention, while optimizing terminal placement for robustness and ease of implementation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If identical semiconductor chips are arranged in different orientations to implement switching functions, then the switching capability is improved, but the terminal coupling complexity increases
Solution Approach 1:
The patent applies asymmetry by arranging identical semiconductor chips in different orientations (first chip in first orientation, second chip in second orientation different from the first). This asymmetric arrangement enables the chips to serve different functions (switching and reverse current prevention) while maintaining terminal coupling simplicity through the specific orientation difference configuration
Solution Approach 2:
The patent implements multi-functionality by using identical semiconductor chips that can serve multiple purposes. The same chip structure is used for both switching operation (first chip) and reverse current prevention (second chip), eliminating the need for different chip types and simplifying manufacturing while achieving versatile functionality
2Adaptability or versatility
If complex terminal coupling is implemented to achieve switching function, then the switching capability is improved, but the manufacturing process becomes more difficult
Solution Approach 1:
The asymmetric orientation arrangement of identical chips simplifies manufacturing by eliminating the need for complex terminal coupling. The specific orientation difference between chips allows for straightforward mounting and connection processes while still achieving the desired switching capability
Solution Approach 2:
The patent changes the orientation parameter of identical semiconductor chips to achieve different functions. By varying the orientation (first orientation vs. second orientation) rather than changing the chip structure or terminal configuration, the switching capability is achieved while maintaining ease of manufacture
3Adaptability or versatility
If identical semiconductor chips in different orientations are used, then the switching function is achieved, but the device size increases
Solution Approach 1:
The asymmetric orientation arrangement allows identical chips to be positioned more efficiently on the substrate. The orientation difference enables compact layout where chips can share common structures and terminals, reducing the overall device area compared to using differently configured chips
4Adaptability or versatility
If complex terminal coupling is implemented, then the switching function is achieved, but the risk of terminal damage increases
Solution Approach 1:
The asymmetric orientation configuration simplifies terminal coupling requirements, reducing the number of complex connections needed. This simpler terminal arrangement lowers the stress and complexity on terminal bonds, thereby reducing the risk of terminal damage and improving reliability
Data Source
AI summary
A first chip on a first lead frame includes a first source electrode on a surface opposite to the first lead frame. A first source terminal is located in a first direction from the first lead frame. A first gate terminal is located in a second direction from the first source terminal. A first conductor contacts the first source electrode and the first source terminal via conductors. A second chip on a second lead frame includes a second source electrode on a surface opposite to the second lead frame. A second gate terminal is located in a second direction from the first gate terminal. A second source terminal is located in the second direction from the second gate terminal. A second conductor contacts the second source electrode and the second source terminal via conductors.


