Semiconductor Device Asymmetric Conductive Plate Stacking
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Solution Overview
Problem
The challenge in manufacturing semiconductor devices lies in precisely stacking and holding multiple conductive plates together using a single jig, while avoiding the deterioration in dimensional precision that comes with using multiple jig parts.
Innovation Solution
The semiconductor device configuration features conductive plates with varying areas, allowing them to be stacked and held in a consistent direction by a single jig, with the upper and lower plates having smaller areas than the middle plate, enabling high-precision manufacturing and improved heat dissipation through strategically sized electrodes and thickness variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple jig parts are used to hold the conductive plates, then the jig can accommodate different plate configurations, but the dimensional precision deteriorates
Solution Approach 1:
The conductive plates are designed with asymmetric area relationships where the middle conductive plate has a larger area than both the upper and lower conductive plates. This asymmetric configuration creates a standardized stacking pattern that allows a single jig to hold all plates simultaneously with consistent positioning, eliminating the need for multiple jig parts while maintaining high dimensional precision throughout the stacking process
2Manufacturing precision
If a single jig is used to hold the conductive plates, then the dimensional precision is maintained, but the jig cannot accommodate removal and repositioning
Solution Approach 1:
The conductive plates are pre-configured with the asymmetric area relationship (middle plate larger than upper and lower plates) before the stacking process. This preliminary design enables the single jig to grasp all plates simultaneously from the outset, allowing the operator to hold, move, and position the entire stack as one unit without needing to remove or reposition individual plates during manufacturing
Data Source
AI summary
A semiconductor device may include: an upper conductive plate, a middle conductive plate, and a lower conductive plate that are stacked on each other; a first semiconductor chip located between the upper conductive plate and the middle conductive plate and electrically connected to both the upper conductive plate and the middle conductive plate; and a second semiconductor chip located between the middle conductive plate and the lower conductive plate and electrically connected to both the middle conductive plate and the lower conductive plate, wherein one of an area of the upper conductive plate and an are of the lower conductive plate may be smaller than an area of the middle conductive plate, and another of the area of the upper conductive plate and the area of the lower conductive plate may be larger than the area of the middle conductive plate.