Semiconductor Atomic Layer Etch for High-Selectivity Pattern Uniformity
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Solution Overview
Problem
Current etch processes in semiconductor manufacturing, such as reactive ion etch (RIE), face challenges with loading effects, selectivity, and uniformity, leading to defects like film residues and corner rounding, which impact product yield and reliability.
Innovation Solution
An apparatus and method for conducting high-selectivity atomic layer etch (ALE) using an ionizer and implanter to generate low-energy charged particles and reactive ions, which selectively remove atoms from a substrate's surface without damaging underlying layers by forming compounds with ionized etchants and sputtering them with particles of controlled energy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If reactive ion etch (RIE) is used for directional patterning, then etching capability is improved, but loading effect and selectivity deteriorate causing poor uniformity
Solution Approach 1:
The etching process is divided into two distinct stages: a first etching process that removes the majority of the film thickness, and a second etching process that completes the pattern formation. This segmentation allows each process to be optimized independently - the first process handles bulk removal efficiently while the second process achieves precise pattern definition with high uniformity, thereby resolving the contradiction between etching speed and pattern uniformity.
2Productivity
If high energy particles are used for etching, then etching rate is improved, but damage to underlying layers increases
Solution Approach 1:
The patent employs parameter changes by adjusting particle energy across different etching stages. High energy particles are used in the first etching process to achieve high etching rates, while low energy particles are used in the second etching process to minimize substrate damage. This dynamic parameter adjustment allows the system to achieve both high productivity and low harmful effects at different stages of the process.
3Productivity
If conventional etch processes are used, then manufacturing speed is maintained, but defect rate increases due to film residues and corner rounding
Solution Approach 1:
The first etching process acts as a preliminary action that removes the bulk of the film material before the second precise etching process. By performing this preliminary removal, the subsequent second etching process operates on a reduced thickness with lower energy particles, which prevents corner rounding and film residue formation. This preliminary action maintains manufacturing speed while significantly improving product yield and reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach achieves precise and uniform pattern definition with high selectivity, reducing defects and improving the reliability and yield of semiconductor manufacturing by controlling the energy distribution of charged particles to avoid damage to underlying layers.
Implementation Method 1
An etchant is generated by an ionizer
Implementation Method 2
The compound is removed by bombarding the compound with the particle
Data Source
AI summary
In some embodiments of the present disclosure, a method of manufacturing a semiconductor structure includes the following operations. A substrate including a first atom and a second atom is provided. An etchant is dispatched from an ionizer. A compound is formed over the substrate by bonding the first atom with the etchant. A particle is released from an implanter. The compound is removed by bombarding the compound with the particle having an energy smaller than a bonding energy between the first atom and the second atom, wherein the particle is different from the etchant.