Semiconductor Structure Reducing Mask Count via Auxiliary Oxide Layer
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Solution Overview
Problem
The high number of masks required in the fabrication process of integrated circuits increases fabrication costs due to the complexity of the semiconductor structure, particularly in the DMOS structure, where seven masks are needed.
Innovation Solution
A semiconductor fabrication process that uses a non-conductive auxiliary structure with predetermined linewidth spaces to define the transmitting circuit, allowing the elimination of a dedicated mask for the transmitting circuit, thereby reducing the overall number of masks needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple masks are used to define different regions (guard ring, gate electrodes, source regions, contact windows) in the fabrication process, then the precision of region definition is improved, but the device complexity and fabrication cost increase
Solution Approach 1:
The oxide layer is designed to serve multiple functions: it defines the guard ring region, defines the transmitting circuit region, and serves as an etch stop layer. By making the oxide layer multi-functional, the patent eliminates the need for separate masks for defining the transmitting circuit region, thereby reducing the total number of masks from seven to three while maintaining precise region definition
Solution Approach 2:
The patent combines the function of defining the transmitting circuit with the oxide layer formation process. The oxide layer simultaneously defines both the guard ring and the transmitting circuit regions, merging multiple patterning functions into a single structural element that requires only one mask for definition
2Reliability
If multiple masks are used for defining different circuit regions, then the reliability of circuit formation is improved, but the loss of time and productivity decrease
Solution Approach 1:
The oxide layer is formed and patterned in advance to define both the guard ring and transmitting circuit regions before subsequent processing steps. This preliminary definition allows later steps to proceed without requiring additional masking, thereby maintaining reliability while improving fabrication efficiency
Solution Approach 2:
The oxide layer serves as a multi-functional element that defines multiple critical regions (guard ring and transmitting circuit) and also acts as an etch stop layer. This multi-functionality ensures reliable circuit formation while reducing the total number of fabrication steps and improving productivity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the number of masks required from seven to three, lowering fabrication costs and simplifying the lithographic steps while maintaining the functionality of the DMOS structure.
Implementation Method 1
an ion implantation process is used for implanting P-type impurities to the exposed portion of the N-epitaxial layer 10
Implementation Method 2
a high temperature thermal process is followed to drive in the P-type impurities to form a P-well region 26
Implementation Method 3
an ion implantation process is used for implanting N-type impurities and a high temperature thermal process is followed to drive in the N-type impurities to form N+ source regions 30
Implementation Method 4
a high temperature thermal process is followed to drive in the N-type impurities to form N+ source regions 30
Implementation Method 5
a high temperature thermal process is carried out to reflow the BPSG layer 52
Data Source
AI summary
A semiconductor fabrication process according to the present invention defines an auxiliary structure with a plurality of spaces with a predetermined line-width in the oxide layer to prevent the conductive material in the spaces from being removed by etching or defined an auxiliary structure to rise the conductive structure so as to have the conductive structure being exposed by chemical mechanical polishing. Thus, the transmitting circuit can be defined without requiring an additional mask. Hence, the semiconductor fabrication process can reduce the number of required masks to lower the cost.