Semiconductor Package Back Side Protection
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Solution Overview
Problem
Conventional semiconductor package technologies face issues with package structure complexity, increased size, and insufficient protection due to thick or hard protective films, leading to warping and cracking during manufacturing, especially in wafer level packaging, which complicates processes and increases costs.
Innovation Solution
A semiconductor device package with a back side protective scheme featuring an elastic adhesive layer and a rigid protection substrate with built-in fiber glass, which absorbs external forces and maintains package integrity, allowing for thinner profiles and improved thermal management, enabling laser marking and reducing manufacturing complexities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a thick protective film is used to protect the package structure, then protection capability is improved, but the package becomes prone to warping and cracking during manufacturing
Solution Approach 1:
The patent uses a composite protective film comprising a first protective film layer and a second protective film layer with different material properties. The first layer provides protection while the second layer prevents warping and cracking, resolving the contradiction between protection capability and structural stability through material composition rather than single-material thickness increase.
Solution Approach 2:
The patent changes the thermal conductivity parameter of the protective film by using materials with specific thermal conductivity values (0.2-1.0 W/mK for the first layer, 0.1-0.5 W/mK for the second layer). This parameter optimization allows adequate protection while maintaining thermal management and preventing warping during manufacturing processes.
2Stability of the object's composition
If the protective film is made thinner to prevent warping and cracking, then package stability is improved, but protection capability becomes insufficient
Solution Approach 1:
The composite structure allows each layer to be optimized independently - the first layer can be thinner for stability while the second layer provides the necessary protection, achieving both goals simultaneously through layered composition rather than relying on a single thick layer.
3Strength
If epoxy material is used for the protective film to provide proper protection, then protection capability is improved, but the manufacturing process becomes more complex and costly
Solution Approach 1:
The patent specifies thermal conductivity parameters (0.2-1.0 W/mK for the first layer, 0.1-0.5 W/mK for the second layer) that balance protection capability with manufacturing ease. These parameter ranges allow for standard manufacturing processes while achieving adequate protection, avoiding the need for complex epoxy formulations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively prevents warping and cracking, enhances packaging yield and quality, and reduces costs by providing a robust yet thin protective structure that matches thermal expansion coefficients with PCBs, thus improving reliability and simplifying the manufacturing process.
Implementation Method 1
an elastic adhesive layer and a rigid protection substrate with built-in fiber glass, which absorbs external forces
Implementation Method 2
a rigid protection substrate with built-in fiber glass, which absorbs external forces and maintains package integrity
Implementation Method 3
matches thermal expansion coefficients with PCBs, thus improving reliability
Data Source
AI summary
The present invention provides a semiconductor device package, comprising a die having a back surface and an active surface formed thereon; an adhesive layer formed on the back surface of the die; a protection substrate formed on the adhesive layer; and a plurality of bumps formed on the active surface of the die for electrically connection. The present invention further provides a method for forming a semiconductor device package, comprising providing a plurality of die having a back surface and an active surface on a wafer; forming an adhesive layer on the back surface of the die; forming a protection substrates on the adhesive layer; forming a plurality of bumps on the active surface of each die; and dicing the plurality of die into individual die for singulation.