Semiconductor Apparatus Back Surface Peripheral Layer Short-Circuit Capability
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Solution Overview
Problem
Semiconductor apparatuses have limited short-circuit capability due to high back surface electric field strength at the pn junction formed by the n− drift region and p+ collector layer, leading to premature breakdown during high voltage periods, especially during load short circuits.
Innovation Solution
Incorporating a p+ back surface peripheral layer with a higher hole concentration than the p+ collector layer in the peripheral region, which injects additional holes into the n− drift region, reducing the back surface electric field strength and enhancing the short-circuit capability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a p+ collector layer is formed on the back surface to ensure breakdown voltage, then the breakdown voltage is improved, but the short-circuit capability deteriorates due to high back surface electric field strength
Solution Approach 1:
The back surface structure is segmented into two distinct regions: a first region with a p+ collector layer having a first hole concentration, and a second region with a p+ back surface peripheral layer having a second hole concentration higher than the first. This segmentation allows different regions to serve different functions - the first region ensures breakdown voltage while the second region reduces back surface electric field strength to improve short-circuit capability.
Solution Approach 2:
Different hole concentrations are applied to different regions of the back surface. The p+ back surface peripheral layer in the second region has a higher hole concentration than the p+ collector layer in the first region, creating local quality variations that optimize both breakdown voltage and short-circuit capability in their respective regions.
2Strength
If the hole concentration in the p+ collector layer is increased to improve breakdown voltage, then the breakdown voltage is improved, but the back surface electric field strength increases causing premature breakdown during short circuits
Solution Approach 1:
The back surface is divided into two regions with different hole concentrations. The first region (p+ collector layer) has a lower hole concentration optimized for breakdown voltage, while the second region (p+ back surface peripheral layer) has a higher hole concentration to reduce electric field strength at the periphery, preventing premature breakdown during short circuits.
Solution Approach 2:
The hole concentration is varied locally across the back surface - the p+ back surface peripheral layer has a higher hole concentration than the p+ collector layer. This local quality variation allows the peripheral region to handle high electric field conditions during short circuits while the central region maintains optimal breakdown characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The increased hole injection from the p+ back surface peripheral layer extends the time before breakdown during high voltage periods, including load short circuits, thereby improving the short-circuit capability of the semiconductor apparatus.
Implementation Method 1
a p+ back surface peripheral layer with a higher hole concentration than the p+ collector layer in the peripheral region, which injects additional holes into the n- drift region, reducing the back surface electric field strength
Data Source
AI summary
A semiconductor apparatus includes a semiconductor substrate. Semiconductor substrate includes an active region and a peripheral region surrounding active region. Semiconductor substrate has a front surface and a back surface. A semiconductor device includes an n− drift region and a p+ collector layer. Peripheral region includes n− drift region and a p+ back surface peripheral layer. P+ back surface peripheral layer is provided on the back surface side of n− drift region. A first hole concentration in p+ back surface peripheral layer is higher than a second hole concentration in p+ collector layer. The short-circuit capability of semiconductor apparatus is improved.