Semiconductor Device Backside Conductive Layer Stability
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Solution Overview
Problem
The challenge lies in manufacturing semiconductor devices with silicon thicknesses below 35 μm, where mechanical stability is insufficient to withstand back-end processes like dicing and die pick, leading to damage such as chipping or cracking, due to the inherent resistance of silicon substrates and the complexities of simultaneous metal and silicon sawing during dicing.
Innovation Solution
A conductive layer is deposited on the backside of the semiconductor workpiece to enhance mechanical stability, allowing it to withstand back-end processes without damage, while minimizing metal in kerf areas to maintain dicing quality and using the metal layer as a mechanical carrier for ultra-thin chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silicon thickness is reduced below 35 μm to lower intrinsic resistance and improve ESD device performance, then electrical resistance decreases, but mechanical stability becomes insufficient to withstand back-end processes
Solution Approach 1:
The patent combines ultra-thin silicon substrate with a supporting substrate to create a composite structure. The silicon layer maintains its thin profile (below 35 μm) for low electrical resistance, while the supporting substrate provides the necessary mechanical strength to withstand back-end processes like dicing and packaging.
Solution Approach 2:
A supporting substrate is introduced as an intermediary element that carries the ultra-thin silicon chip. This mediator provides mechanical support during handling and processing, allowing the silicon to remain thin for electrical performance while the substrate handles mechanical stresses.
2Ease of manufacture
If mechanical wafer dicing process is used to separate silicon and metal layers, then separation is achieved, but metal sticking on the sawing blade occurs causing dicing defects
Solution Approach 1:
The patent replaces the mechanical sawing process with a chemical separation method. The metal layer is selectively removed using chemical etching or dissolution, eliminating the mechanical contact that causes metal sticking and blade degradation, thereby improving dicing quality.
Solution Approach 2:
A sacrificial layer or release structure is introduced as an intermediary between the metal and silicon layers. This mediator allows for clean separation during dicing by preventing direct metal-to-blade contact, reducing sticking issues and improving manufacturing precision.
3Ease of operation
If needle lift and vacuum handler gripping are used in die pick process, then chip transport is achieved, but ultra-thin chips break due to mechanical force
Solution Approach 1:
The supporting substrate serves as a mediator during the die pick process. Instead of directly handling the fragile ultra-thin chip, the needle and vacuum handler interact with the more robust substrate, which protects the chip from mechanical forces that would cause breakage.
Solution Approach 2:
The supporting substrate provides pre-established mechanical protection before the chip is subjected to handling forces. This cushioning effect absorbs and distributes stresses during needle lift and vacuum gripping, preventing chip breakage during transport.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of ultra-thin chips with reduced electrical resistance, improving mechanical stability during handling and packaging processes, thereby overcoming the limitations of traditional manufacturing methods.
Implementation Method 1
depositing at least one conductive layer over a second side of the semiconductor workpiece
Data Source
AI summary
According to various embodiments, a method for manufacturing a semiconductor device may include providing a semiconductor workpiece including a device region at a first side of the semiconductor workpiece, wherein a mechanical stability of the semiconductor workpiece is insufficient to resist at least one back end process without damage, and depositing at least one conductive layer over a second side of the semiconductor workpiece opposite the first side of the semiconductor workpiece, wherein the at least one conductive layer increases the mechanical stability of the semiconductor workpiece to be sufficient to resist the at least one back end process without damage.