Semiconductor Backside Defect Detection via Reference Marks
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Solution Overview
Problem
Conventional defect detection methods for semiconductor wafers are inefficient and costly due to reliance on manual selection and random sampling, particularly when detecting defects on the backside of wafers, which are difficult to access and analyze, leading to reduced accuracy and increased time and cost in the fabrication process.
Innovation Solution
A defect detection method that uses failure analysis to locate suspected areas on the backside of semiconductor samples, forming reference marks with physical energy, and utilizing these marks to determine the relative location of defects on the front side, thereby reducing the need for confidential circuit layout diagrams and improving the efficiency of defect detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If manual defect review with SEM is performed for all defects, then measurement precision is improved, but productivity deteriorates due to the large number of defects making it impractical
Solution Approach 1:
The patent segments defects into different categories based on their characteristics (size, shape, location, severity). By classifying defects into groups such as critical, major, and minor defects, the system enables selective detailed review only for high-priority defects rather than examining every defect manually, thus maintaining detection accuracy while improving review efficiency
Solution Approach 2:
The patent creates virtual copies or representations of defects through automated image processing and analysis. Digital models and classifications of defects are generated, allowing engineers to review standardized defect representations rather than original high-resolution images for all defects, reducing the time required for defect review while preserving essential diagnostic information
2Ease of operation
If random sampling is used for defect review, then ease of operation is improved, but measurement precision deteriorates because only a few effective samples are valid
Solution Approach 1:
The patent implements a feedback mechanism where defect classification results and analysis outcomes are used to continuously improve the sampling strategy. The system learns from previous defect reviews and adjusts sampling priorities, ensuring that future samples are more likely to be representative and valid, thereby maintaining both operational simplicity and analytical accuracy
Solution Approach 2:
The patent performs preliminary defect classification and prioritization before the actual defect review process. By pre-sorting defects based on their potential impact and characteristics, the system ensures that the samples selected for review are already optimized for effectiveness, eliminating the need for random sampling while keeping the process simple and systematic
3Measurement precision
If layout navigation system is used for backside defect detection, then measurement precision is improved, but device complexity increases due to the need for confidential circuit layout diagrams
Solution Approach 1:
The patent extracts and removes the dependency on confidential circuit layout diagrams from the defect detection system. By developing alternative methods that do not require access to proprietary layout information, the system maintains the ability to accurately locate backside defects while eliminating the complexity and security concerns associated with integrating layout navigation systems
Solution Approach 2:
The patent employs temporary or disposable reference structures and markers that can be easily added and removed during the defect detection process. These temporary references enable precise location mapping without requiring permanent integration of complex layout navigation systems, thereby reducing overall system complexity while maintaining measurement precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method significantly reduces the time, cost, and complexity of defect detection on semiconductor wafers by allowing non-contact formation of reference marks and using abnormal voltage contrast to accurately determine defect locations, enhancing the reliability and yield of the semiconductor fabrication process.
Implementation Method 1
utilizing a physical energy for forming a plurality of reference marks around the suspected area on the backside of the semiconductor sample
Implementation Method 2
utilizing the reference marks for determining the relative location of the defect on the front side of the semiconductor sample
Data Source
AI summary
A defect detection method is disclosed, in which the method includes: providing a semiconductor sample, wherein the semiconductor sample comprises at least one defect; utilizing a failure analysis for detecting at least one suspected area on the backside of the semiconductor sample; utilizing a physical energy for forming a plurality of reference marks around the suspected area on the backside of the semiconductor sample; and utilizing the reference marks for determining the relative location of the defect on the front side of the semiconductor sample.