Power Semiconductor Device Backside Emitter Zone Segmentation
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Solution Overview
Problem
Power semiconductor devices face challenges in thermal distribution homogenization, leading to reduced reliability and increased power losses, necessitating costly safety margins in thermal design.
Innovation Solution
A power semiconductor device design featuring a backside region with multiple emitter zones of varying emitter and injection efficiencies, optimized to improve thermal robustness and tradeoff between softness and power losses, by strategically arranging regions of different conductivity types and dopant concentrations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional uniform backside emitter zone design is used, then manufacturing is simple, but temperature distribution is inhomogeneous leading to reduced reliability
Solution Approach 1:
The backside emitter zone is segmented into multiple discrete regions (first and second regions) with different conductivity types and emitter efficiencies. This segmentation allows each region to contribute differently to carrier injection, enabling more uniform temperature distribution across the active area and improving thermal robustness without requiring complex external cooling systems.
Solution Approach 2:
Different regions of the backside emitter zone are assigned different local properties: first regions have a first conductivity type and first emitter efficiency, while second regions have a second conductivity type and second emitter efficiency. This local differentiation enables targeted carrier injection in specific areas, homogenizing the overall temperature distribution and enhancing reliability.
2Productivity
If higher emitter efficiency is used, then device performance is improved, but power losses increase
Solution Approach 1:
The patent applies local quality by creating regions with different emitter efficiencies in specific locations. High emitter efficiency regions provide strong carrier injection for good device performance, while low emitter efficiency regions reduce excessive carrier injection that would cause high power losses. The overall device achieves an optimized balance between performance and efficiency.
Solution Approach 2:
The patent changes the emitter efficiency parameter across different regions of the backside emitter zone. By varying this parameter spatially rather than maintaining a uniform value, the device can achieve both high performance (from high efficiency regions) and low power losses (from low efficiency regions), effectively resolving the contradiction between productivity and energy loss.
Data Source
AI summary
A power semiconductor device includes: a semiconductor body; a first load terminal structure coupled to the body front side and a second load terminal structure coupled to the body backside; an active area for conducting a load current between the load terminal structures; a drift region having a first conductivity type; a backside region arranged at the backside and including, inside the active area, first and second backside emitter zones. At least one of the backside emitter zones includes: first sectors each having at least one first region of a second conductivity type, the first region arranged in contact with the second load terminal structure and having a smallest lateral extension of at most 50 μm; and/or second sectors each having a second region of the second conductivity type arranged in contact with the second load terminal structure and having a smallest lateral extension of at least 50 μm.