Semiconductor Backside Metallization Channels for Dicing Fleck Prevention
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Solution Overview
Problem
Conventional dicing saws can dislodge backside metallization flecks during semiconductor wafer processing, causing shorts between solder bumps, which persist even after reflow, due to the lack of favorable solder wettable properties on silicon substrates.
Innovation Solution
Forming channels in the backside metallization structure aligned with dicing streets to prevent flecks from being kicked up during the dicing process, using techniques like laser drilling or wet/dry etching to create voids for the saw blade to pass through without encountering metal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional dicing saws are used to cut semiconductor wafers, then dicing operations can be performed efficiently, but backside metallization flecks are kicked up and may land on solder bumps causing shorts
Solution Approach 1:
The harmful backside metallization is extracted by forming channels that remove material in the dicing street regions, creating voids where flecks cannot be generated or launched during dicing. The channels extract the problematic metallization material from the cutting path while preserving the metallization in the chip active areas.
Solution Approach 2:
Channels act as an intermediary structure between the dicing saw blade and the backside metallization. The channels provide a controlled pathway that allows the saw blade to pass through without directly contacting and dislodging metallization particles, thereby mediating the interaction to prevent harmful fleck generation.
2Reliability
If channels are formed in the backside metallization structure to prevent flecks, then reliability is improved, but device complexity and manufacturing steps increase
Solution Approach 1:
The backside metallization structure is segmented into distinct regions: channels (voids) in the dicing street areas and continuous metallization in the chip active areas. This segmentation allows the structure to serve dual purposes - maintaining solder wettablity where needed while preventing fleck generation in cutting areas.
Solution Approach 2:
The metallization structure exhibits local quality variations: channels are present only in dicing street regions where fleck prevention is needed, while continuous metallization is maintained in chip active regions where solder wettablity is required. This localized modification optimizes reliability without unnecessarily complicating the entire structure.
3Reliability
If channels are formed in the backside metallization structure, then flecks are prevented from being kicked up, but manufacturing process steps and time are increased
Solution Approach 1:
Channels are formed in the backside metallization structure before the dicing operation. This preliminary action prepares the structure in advance to prevent fleck generation during cutting, eliminating the need for post-dicing cleanup or rework and ensuring reliability from the start.
Solution Approach 2:
The channel formation process is merged with existing backside metallization fabrication steps, such as combining channel etching with the metallization deposition or patterning process. This integration reduces the total number of separate manufacturing steps and minimizes additional cycle time while achieving the reliability benefit.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents flecks from landing on the front side, eliminating the risk of shorts between solder bumps and ensuring reliable dicing operations.
Implementation Method 1
forming channels in a metallization structure on a backside of a semiconductor workpiece... using techniques like laser drilling
Implementation Method 2
using techniques like laser drilling or wet/dry etching to create voids
Implementation Method 3
using techniques like laser drilling or wet/dry etching to create voids
Data Source
AI summary
Various semiconductor workpieces and methods of dicing the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a channel in a metallization structure on a backside of a semiconductor workpiece. The semiconductor workpiece includes a substrate. The channel is in substantial alignment with a dicing street on a front side of the semiconductor chip.


