Semiconductor Bank Active Pulse Masking Circuit

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Solution Overview

Problem

Semiconductor memory devices with multiple banks face excessive current consumption when activated within a predetermined time, leading to instability and potential malfunction, as existing technologies struggle to manage bank activations efficiently.

Innovation Solution

A semiconductor device is designed with a command buffer, active controller, pulse generator, and masking signal generator to count and mask active pulses exceeding a predetermined number within a specific time window, preventing unnecessary current consumption by controlling bank active operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If multiple banks are activated within a predetermined time to increase page hit rate and memory bus efficiency, then operation speed and bandwidth are improved, but current consumption becomes excessive leading to instability and potential malfunction

Engineering Contradiction:
Improveoperation speedVSAvoidcurrent consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent implements a feedback mechanism through the active controller that continuously monitors the number of active pulses within a predetermined time window. When the count reaches a threshold value, the system automatically generates an active masking signal to prevent further bank activations, creating a closed-loop control system that dynamically adjusts bank activation based on real-time conditions.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces an intermediary active masking signal between the command buffer and the bank activation logic. This masking signal acts as a mediator that selectively blocks excessive active commands from reaching the banks, allowing the system to maintain high-speed operation when needed while preventing current consumption from exceeding safe levels.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If multiple banks are activated within a predetermined time to increase page hit rate and memory bus efficiency, then operation speed and bandwidth are improved, but system stability deteriorates due to excessive current consumption

Engineering Contradiction:
Improveoperation speedVSAvoidsystem stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The active controller provides continuous feedback on bank activation counts, comparing the number of activated banks against a predetermined threshold. This feedback mechanism enables the system to detect when stability is at risk and automatically adjust activation behavior to maintain reliable operation.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system performs preliminary action by generating the active masking signal before excessive current consumption can occur. By proactively limiting bank activations when the threshold is reached, the system prevents instability conditions rather than reacting to them after they occur.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If bank activation is unrestricted to maximize page hit rate, then memory bus efficiency is improved, but illegal activation scenarios occur violating JEDEC specifications

Engineering Contradiction:
Improvememory bus efficiencyVSAvoidcompliance with specifications
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system uses feedback control to monitor bank activation patterns and ensure compliance with JEDEC specifications. The active controller counts active pulses and generates masking signals when activation patterns would violate specification limits, maintaining productive operation within compliant boundaries.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The active masking signal serves as an intermediary layer that enforces JEDEC specification requirements between the command buffer and bank activation logic. It selectively permits or blocks active commands to ensure compliance while maintaining memory bus efficiency within acceptable limits.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9672157B2Semiconductor device
Publication Date: 2017.06.06 SK HYNIX INC
  • US9672157B2 patent drawing
  • US9672157B2 patent drawing
  • US9672157B2 patent drawing

AI summary

A semiconductor device may include an active controller configured to count pulses of an active signal, and activate an active masking signal for masking an active operation when the counted number of the active signal is greater than predetermined activation times of the active signal during a predetermined bank active section.