Semiconductor Bank Redundancy Analysis via Cluster Mapping
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods for redundancy analysis in semiconductor devices face challenges with increasing density, leading to higher error probabilities and longer repair times due to high time complexity algorithms and uniform repair solutions, especially in DRAM arrays with minor fabrication defects.
Innovation Solution
A method and apparatus for performing redundancy analysis by classifying semiconductor device banks into clusters based on attributes like error rate and position, determining cluster and bank parameters, and mapping appropriate algorithms for efficient repair solutions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If high density semiconductor devices are used, then device capacity increases, but error probability increases
Solution Approach 1:
The patent segments banks with similar error characteristics into clusters, allowing targeted repair strategies for each cluster rather than treating all banks uniformly. This segmentation enables efficient handling of high-density device errors by grouping similar failure modes together.
Solution Approach 2:
The patent changes the parameter of repair algorithm selection by mapping different algorithms to different clusters based on error characteristics. This parameter change allows the system to adapt the repair approach according to the specific error type and cluster properties, improving reliability in high-density devices.
2Device complexity
If uniform algorithm is used for all banks, then implementation simplicity is maintained, but repair time increases
Solution Approach 1:
The patent divides banks into clusters and applies different algorithms to different clusters, achieving faster repair times through targeted approaches while maintaining implementation simplicity through automated cluster-based selection.
Solution Approach 2:
The patent changes the algorithm parameter based on cluster characteristics, allowing optimal algorithm selection for each cluster type. This parameter adaptation reduces overall repair time while the automated mapping process keeps implementation complexity manageable.
3Reliability
If high yield repair solutions are produced, then device functionality is improved, but time complexity of algorithm increases
Solution Approach 1:
The patent segments the repair problem into clusters, allowing simpler algorithms to be applied to each segment rather than using a single complex algorithm for all banks. This segmentation reduces overall time complexity while maintaining high yield through targeted repair strategies.
Solution Approach 2:
The patent changes the algorithm complexity parameter based on cluster characteristics, mapping simpler algorithms to clusters where they are sufficient. This parameter adaptation reduces time complexity while maintaining device functionality through appropriate algorithm selection for each cluster type.
Data Source
AI summary
Embodiments of present disclosure relates to method and apparatus for performing redundancy analysis of a semiconductor device. For the redundancy analysis, plurality of banks in the semiconductor device is classified to be associated with a cluster from plurality of clusters. The classification is based on one or more attributes associated with the plurality of banks. Further, at least one cluster parameter for the plurality of clusters and at least one bank parameter for the plurality of banks, is determined. One or more algorithms is mapped with the plurality of clusters, based on the at least one cluster parameter and the at least one bank parameter. The redundancy analysis of at least one bank in the plurality of clusters is performed based on the mapping.