Semiconductor Structure Barrier Layer Etching Depth Control
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Solution Overview
Problem
The increasing miniaturization of semiconductor devices leads to a reduction in the junction depth of the source-drain region, causing excessive contact leakage due to the proximity of conductive contact structures to the substrate, which affects the stability and conductivity of the semiconductor structure.
Innovation Solution
A semiconductor structure and manufacturing method that involve forming a barrier layer on the peripheral region to adjust the etching depth, reducing the depth of the second conductive pillar into the second doped region, and preprocessing the doped regions to enhance ion concentration, thereby increasing the distance between the conductive contact structure and the PN junction, reducing leakage current, and improving contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the critical dimension of transistor devices is continuously reduced to improve integration degree, then the integration degree of integrated circuits is improved, but the junction depth of source-drain region is reduced causing excessive contact leakage
Solution Approach 1:
The patent applies local quality by forming a barrier layer specifically in the peripheral region where conductive pillars are located, while maintaining different doping concentrations in core and peripheral regions. This localized modification allows the peripheral region to have different etching characteristics, enabling precise control of conductive pillar depth to avoid excessive leakage while maintaining high integration density.
Solution Approach 2:
The patent changes physical parameters by introducing a barrier layer with different material composition and etching rate, and by adjusting doping concentrations in different regions. These parameter changes enable differential etching depths, allowing conductive pillars in the peripheral region to be shallower than those in the core region, thus preventing excessive contact leakage while maintaining device performance.
2Reliability
If the depth of conductive contact structure is increased to improve contact resistance, then the contact resistance is reduced, but the proximity to PN junction causes excessive leakage current
Solution Approach 1:
The patent implements local quality by creating spatially varying doping concentrations and introducing barrier layers in specific regions. The peripheral region has different properties from the core region, allowing conductive pillars to have optimal depths locally - shallow enough in peripheral regions to avoid leakage, while maintaining good electrical contact.
Solution Approach 2:
The barrier layer acts as an intermediary element between the conductive pillar and the substrate. This intermediate layer enables precise control of the etching depth, allowing the conductive pillar to reach an optimal depth that balances contact resistance reduction with leakage prevention, without directly contacting the PN junction.
3Ease of manufacture
If uniform etching depth is used for all conductive pillars to simplify manufacturing, then the manufacturing process is simplified, but the contact leakage cannot be effectively controlled in different regions
Solution Approach 1:
The patent applies local quality by forming a barrier layer specifically in the peripheral region, creating spatially varying etching characteristics. This allows different regions to have optimized etching depths - the peripheral region etches less deeply due to the barrier layer, preventing leakage, while the core region maintains deeper etching for optimal contact.
Solution Approach 2:
The barrier layer is formed in advance before the etching process, performing a preliminary action that pre-determines the etching depth profile. This preliminary modification of the substrate structure enables subsequent uniform etching to produce non-uniform final depths, simplifying the manufacturing process while achieving region-specific depth control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces contact leakage current and enhances the stability and conductivity of the semiconductor structure by optimizing the depth of the conductive pillars and ion concentration, addressing the issue of excessive leakage in miniaturized devices.
Implementation Method 1
etching a dielectric layer and the first doped region of the core region along one of the openings by using the mask layer as a mask, to form a first trench in the first doped region, and further etching the barrier layer and the second doped region of the peripheral region along one of the openings, to form a second trench in the second doped region
Implementation Method 2
preprocessing the doped regions to enhance ion concentration, thereby increasing the distance between the conductive contact structure and the PN junction, reducing leakage current, and improving contact resistance
Data Source
AI summary
A semiconductor structure and a manufacturing method are disclosed. The semiconductor structure includes: a substrate, including a core region and a peripheral region, where a part of the substrate of the core region is provided with a first gate, a first doped region is provided in a part of the substrate at two opposite sides of the first gate, and a dielectric layer is provided on the top surface of the first doped region; a part of the substrate of the peripheral region is provided with a second gate, and a second doped region is provided in a part of the substrate at two opposite sides of the second gate; a first conductive pillar; and a second conductive pillar, where a depth of the second conductive pillar into the second doped region is less than a depth of the first conductive pillar into the first doped region.