Semiconductor Device Barrier Layer Void Prevention
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Solution Overview
Problem
In high-integration semiconductor devices, voids in the insulating layer between patterns can lead to connection defects between contact plugs, and existing methods to address this often deteriorate the reliability of the semiconductor device.
Innovation Solution
A semiconductor device is manufactured with an interlayer insulating layer, a conductive layer pattern, a side wall insulating layer, and a barrier layer formed at the interface between the semiconductor substrate and the side wall insulating layer to prevent voids from being filled with the conductive layer, thereby isolating the recess region and maintaining device reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the insulating layer thickness is increased to fill spaces between lower patterns, then the insulating layer can adequately cover the patterns, but voids are generated within the insulating layer when the distance between patterns is small
Solution Approach 1:
The insulating layer structure is segmented into multiple portions: a first insulating layer filled in the recess region between patterns, and a second insulating layer formed on the first insulating layer. This segmentation allows each layer to serve specific functions - the first layer fills the recess without voids, while the second layer provides additional coverage, thereby eliminating voids while maintaining adequate coverage.
Solution Approach 2:
The recess region between adjacent patterns is pre-formed by etching before filling with the insulating layer. This preliminary action creates a controlled cavity structure that allows the insulating material to be deposited without trapping voids, ensuring complete filling while maintaining proper coverage over the patterns.
2Productivity
If the distance between lower patterns is reduced for high-integration, then more patterns can be packed, but voids are generated within the insulating layer
Solution Approach 1:
The insulating layer is divided into a first insulating layer that fills the recess region and a second insulating layer formed on top. This segmentation enables the first layer to completely fill the narrow recess space between closely-spaced patterns without voids, while the second layer provides additional coverage, thus maintaining manufacturing precision even at high integration densities.
Solution Approach 2:
Different regions of the insulating structure are assigned different functions: the first insulating layer is optimized for filling the recess region between patterns, while the second insulating layer is optimized for providing coverage. This local quality differentiation ensures void-free filling in critical areas while maintaining overall structural integrity.
Data Source
AI summary
A semiconductor device and method where a side wall insulating layer, extending perpendicular from a top surface of a semiconductor substrate, is prevented from contacting the semiconductor substrate by a barrier layer formed at an interface between the semiconductor substrate and the insulating layer.