Power Semiconductor Base Layer Depth Profile via Self-Aligned Masking
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Solution Overview
Problem
Existing methods for manufacturing power semiconductor devices, such as IGBTs and MOSFETs, face challenges in achieving low on-state losses and high safe operating area (SOA) capabilities due to complex and delicate manufacturing steps, particularly in creating the modulated p base layer profile which requires precise mask alignment and high energy phosphorous ion implantation for depths exceeding 1 μm.
Innovation Solution
A method involving the formation of a first oxide layer and a structured gate electrode layer on a substrate, where a first dopant is implanted and diffused, followed by partial removal of the oxide layer and subsequent implantation and diffusion of a second dopant using the same gate electrode layer as a mask, allowing for self-aligned manufacturing of both the enhancement and base layers with a varied depth profile.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If high energy phosphorous ion implantation is used to create the modulated p base layer profile at depths exceeding 1 μm, then the base layer depth profile can be achieved, but the manufacturing process becomes complex and delicate requiring precise mask alignment
Solution Approach 1:
A thick oxide layer is formed preliminarily on the substrate before any implantation steps. This thick oxide layer serves as a robust mask that simplifies subsequent processing steps, eliminating the need for precise mask alignment during ion implantation while still enabling the creation of the desired modulated base layer depth profile through controlled implantation and diffusion sequences
Solution Approach 2:
The manufacturing process is segmented into distinct stages: first forming the thick oxide mask, then performing phosphorous implantation and diffusion to create the enhancement layer, followed by removal of the thick oxide in specific areas, and finally performing boron implantation and diffusion to create the modulated base layer. This segmentation allows each step to be optimized independently, reducing overall process complexity
2Manufacturing precision
If multiple masks are used for manufacturing the first n layer and the p layer, then the doping profiles can be controlled, but the manufacturing process becomes more complex
Solution Approach 1:
The thick oxide layer is designed to serve multiple functions: it acts as a mask during phosphorous implantation to define the enhancement layer region, and after selective removal, the remaining portions continue to serve as masks during subsequent boron implantation steps. This multi-functionality eliminates the need for separate masks for different implantation steps, reducing process complexity while maintaining precise doping profile control
Solution Approach 2:
The thick oxide layer acts as an intermediary element that mediates between the implantation processes and the underlying semiconductor layers. By controlling the thickness and selective removal of this oxide intermediary, precise spatial control over doping profiles is achieved without requiring multiple separate masks
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method simplifies the manufacturing process, achieves low on-state losses, and enhances the SOA capability by creating a base layer with a lower depth in the central area and higher depth in the peripheral area, improving the operational performance of semiconductor devices.
Implementation Method 1
implanting a first dopant of the first conductivity type into the substrate on the first main side using the formed gate electrode layer as a mask
Implementation Method 2
diffusing the first dopant into the substrate
Implementation Method 3
the first oxide layer is partially removed after diffusing the first dopant into the substrate and before implanting the second dopant into the substrate
Implementation Method 4
diffusing the second dopant into the substrate
Data Source
AI summary
A method of manufacturing a power semiconductor device is provided. A first oxide layer is produced on a first main side of a substrate of a first conductivity type. A structured gate electrode layer with at least one opening is then formed on the first main side on top of the first oxide layer. A first dopant of the first conductivity type is implanted into the substrate on the first main side using the structured gate electrode layer as a mask, and the first dopant is diffused into the substrate. A second dopant of a second conductivity type is then implanted into the substrate on the first main side, and the second dopant is diffused into the substrate. After diffusing the first dopant into the substrate and before implanting the second dopant into the substrate, the first oxide layer is partially removed. The structured gate electrode layer can be used as a mask for implanting the second dopant.