Semiconductor Device Thickness Reduction via BEOL and Flexible Substrate
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Solution Overview
Problem
Conventional semiconductor processors are thick due to the use of large-diameter solder balls and organic materials in printed circuit boards, leading to power loss and warpage issues, which increase manufacturing costs.
Innovation Solution
A semiconductor device with reduced thickness is manufactured using a back end of line (BEOL) layer on a dummy substrate, where semiconductor dies are bonded and encapsulated, and a solder ball is connected to the BEOL layer, eliminating the need for a thick printed circuit board and using inorganic materials to match thermal expansion coefficients.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a thick printed circuit board with organic materials is used as substrate, then the processor structure is simple to manufacture, but the processor thickness increases and warpage occurs due to thermal expansion coefficient differences
Solution Approach 1:
The patent removes the thick printed circuit board substrate from the processor structure entirely. Instead, it uses a thin flexible circuit board with a copper foil layer that serves as the ground electrode, extracting the essential electrical function while eliminating the thickness and warpage problems associated with traditional thick PCB substrates.
Solution Approach 2:
The patent changes the substrate parameters by transitioning from a thick rigid PCB to a thin flexible circuit board with copper foil. This parameter change reduces the substrate thickness from millimeters to micrometers, directly solving the thickness contradiction while maintaining electrical functionality.
2Ease of manufacture
If a thick printed circuit board with organic materials is used as substrate, then the processor structure is simple to manufacture, but warpage occurs due to thermal expansion coefficient differences between organic and inorganic materials
Solution Approach 1:
The patent achieves material homogeneity by using a copper foil layer as both the ground electrode and a stable substrate layer. The copper material provides uniform thermal expansion characteristics that match other inorganic components, eliminating the thermal expansion coefficient mismatches that cause warpage in traditional multi-material PCB constructions.
Solution Approach 2:
The patent creates a composite structure where the flexible circuit board combines a thin polymer substrate with a copper foil layer. This composite material approach provides both the flexibility needed for thin construction and the thermal stability of copper, resolving the warpage issue while maintaining ease of manufacture.
3Reliability
If large-diameter solder balls are used as internal conductors, then the connection is simple and reliable, but the processor thickness increases
Solution Approach 1:
The patent replaces traditional large-diameter spherical solder balls with thin-film copper conductor patterns deposited on the flexible circuit board. These thin film conductors maintain electrical connection reliability through controlled copper traces while reducing the vertical thickness contribution from millimeter-scale solder balls to micrometer-scale copper layers.
4Length of stationary object
If a thin flexible circuit board with copper foil is used instead of thick PCB, then the processor thickness is reduced, but the manufacturing process becomes more complex
Solution Approach 1:
The patent replaces mechanical assembly processes (attaching thick PCB, mounting large solder balls) with thin-film deposition processes. The copper foil ground electrode and internal conductors are created through standard PCB copper plating and patterning techniques, which are well-established manufacturing processes that do not significantly increase manufacturing complexity despite producing thinner structures.
Data Source
AI summary
A semiconductor device with reduced thickness is disclosed and may include forming a back end of line (BEOL) comprising a redistribution layer on a dummy substrate. A first semiconductor die may be bonded to a first surface of the BEOL and a second semiconductor die may be bonded to the first semiconductor die. The first and second semiconductor dies may be electrically coupled to the BEOL. The first and second semiconductor dies and the BEOL may be encapsulated utilizing a first encapsulant. The dummy substrate may be removed thereby exposing a second surface of the BEOL opposite to the first surface. A solder ball may be placed on the exposed second surface of the BEOL. The second semiconductor may be stacked stepwise on the first semiconductor and may be flip-chip bonded. The semiconductor dies may be electrically coupled to the BEOL utilizing a lateral plating layer or conductive wires.