Semiconductor Assembly Layout With Variable BGA Pitch for PCB Cooling
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Solution Overview
Problem
Semiconductor components with ball grid array (BGA) design face challenges in maintaining satisfactory routing and contactability while ensuring effective heat dissipation, particularly with increased cooling demands, as the pitch of external contact pads and contacts must be kept from becoming too small to prevent short circuits and require costly microvia technology for heat dissipation.
Innovation Solution
A semiconductor assembly with a redistribution substrate and printed circuit board design where contact pads are arranged at a greater distance in one region to accommodate through holes for heat dissipation, allowing for cost-effective production and optimization of heat dissipation without the need for microvia technology, while maintaining electrical functionality in a second region with closer pad spacing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the pitch of external contact pads is reduced to increase routing density, then the number of contacts per area increases, but the risk of short circuits increases and manufacturing precision requirements become more stringent
Solution Approach 1:
The patent applies different pitch values for different regions of the contact pads. A first pitch value is used in regions where through-holes are present, and a second, smaller pitch value is used in regions without through-holes. This local differentiation allows optimized routing density in safe zones while maintaining adequate spacing in zones with thermal vias, thereby resolving the contradiction between routing density and short circuit risk.
2Temperature
If through holes are added for heat dissipation, then cooling effectiveness improves, but the device complexity and manufacturing cost increase due to required microvia technology
Solution Approach 1:
The patent changes the pitch parameter of contact pads in specific regions to create space for through-holes. By increasing the pitch in regions where thermal management is critical, the design accommodates heat-dissipating through-holes using conventional drilled holes rather than complex microvia technology. This parameter adjustment enables effective heat dissipation while maintaining manufacturing simplicity and cost-effectiveness.
3Temperature
If the pitch of contact pads is increased to accommodate through holes, then heat dissipation capability improves, but the overall number of contacts that can be fitted decreases
Solution Approach 1:
The patent implements a hybrid pitch strategy where different regions of the contact pad array use different pitch values. Regions requiring heat dissipation feature larger pitch to accommodate through-holes, while other regions maintain smaller pitch to maximize contact density. This localized approach ensures that heat dissipation needs are met without unnecessarily reducing the overall number of contacts across the entire array.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables efficient heat dissipation and cost-effective production of semiconductor components with improved routing and heat management, allowing for the use of drilled holes instead of microvia technology, enhancing performance and reducing production costs.
Implementation Method 1
Through holes are arranged between the contact pads in the first region of the printed circuit board... good heat dissipating and linking to a heat sink are made possible via the through holes arranged in the first region
Implementation Method 2
The through holes extend from the top side of the printed circuit board, on which the semiconductor component is arranged, to the underside of the printed circuit board, which can be connected to a heat sink... The heat dissipation is effected in particular via a heat sink on which the printed circuit board is arranged
Data Source
AI summary
A semiconductor assembly includes a semiconductor component having a redistribution substrate with a top side, an underside and a semiconductor chip on the top side. Contact connection pads for connection to contact pads of the chip are on the top side of the substrate. External contact pads on the underside are electrically connected to the contact connection pads by conductor tracks. The external contact pads are at a greater distance from one another in a first region than a second region of the underside. The semiconductor component is on a printed circuit board. Contact pads corresponding to the external contacts are on a top side of the printed circuit board and are at a greater distance from one another in a first region than a second region of the top side. Through holes are formed between the contact pads in the first region of the printed circuit board.