Semiconductor Bias Potential Generation Using Oxide Transistors

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Solution Overview

Problem

Operational amplifiers require an optimal bias potential for efficient operation, but existing methods to generate this potential, such as using flash memory for correction data, result in high power consumption due to frequent data reading and large memory requirements.

Innovation Solution

A semiconductor device with a circuit that includes a digital-to-analog converter and a capacitor to store bias potential, using an oxide semiconductor transistor with low off-state current, allowing for dynamic reconfiguration and reduced power consumption by optimizing the potential generation based on usage environment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If correction data is stored in flash memory and read out continuously, then the bias potential can be optimized for operational amplifier performance, but power consumption increases

Engineering Contradiction:
Improveoperational amplifier performanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent pre-calculates and stores correction data in a register during manufacturing or initialization, so that the optimal bias potential can be quickly applied without continuous reading from flash memory. This preliminary preparation eliminates the need for repeated data access during operation, thereby reducing power consumption while maintaining operational amplifier performance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts only the necessary correction data from the flash memory into a register or buffer, and uses this extracted data for bias potential generation. By separating the storage function (flash memory) from the access function (register), the system avoids continuous reading from high-power flash memory while maintaining the ability to provide optimized bias potentials.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If a large-capacity flash memory is used to store correction data, then the bias potential can be accurately controlled, but the device size and complexity increase

Engineering Contradiction:
Improvebias potential control precisionVSAvoidmemory capacity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts only the essential correction data from large-capacity flash memory into a smaller register or buffer. This extraction approach maintains the precision of bias potential control by preserving the necessary correction values while eliminating the need for large flash memory during operation, thereby reducing device complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent uses a small, disposable register or buffer for storing correction data during operation, replacing the need for continuous access to large, expensive flash memory. The register acts as a temporary storage that is sufficient for the operation lifetime, reducing overall device complexity while maintaining control precision.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Speed

If the current value from the current source is increased, then the operational amplifier operation speed improves, but power consumption increases

Engineering Contradiction:
Improveoperational amplifier operation speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic adjustment of the bias potential using correction data, allowing the current source to optimize its output current based on actual operating conditions. This dynamic control enables the system to achieve high operation speed when needed while consuming less power during low-activity periods, resolving the trade-off between speed and power consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the bias potential parameter based on correction data to optimize the current source output. By adjusting the bias potential dynamically, the system can achieve the desired operation speed with minimal current, thereby reducing power consumption while maintaining performance.

Inventive Principle:
Principle #35Parameter changes

4Adaptability or versatility

If the bias potential is optimized for each operational amplifier, then the performance varies suitably for different usage environments, but the circuit complexity increases

Engineering Contradiction:
Improveperformance adaptation to usage environmentVSAvoidcircuit configuration
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a universal bias potential generation circuit that can serve multiple operational amplifiers. The correction data storage and conversion circuitry is designed to be shared across multiple amplifiers, allowing each to receive optimized bias potentials without requiring separate dedicated circuits for each amplifier, thereby reducing overall circuit complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the correction data storage, digital-to-analog conversion, and bias potential generation functions into a single integrated circuit block. This consolidation allows multiple operational amplifiers to share the same resource, achieving environment-specific optimization without multiplying the circuit complexity for each amplifier.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables a semiconductor device with reduced power consumption, capable of generating suitable signals and adapting performance in real-time, while maintaining low off-state current and minimizing power usage across varying conditions.

Implementation Method 1

The first circuit converts a digital signal input from the first memory circuit into an analog signal

Methodology Applied
Scientific EffectDigital-to-analog conversion:

Implementation Method 2

The first capacitor is electrically connected to the output node. The analog signal is input to the input node

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 3

A channel in the first transistor is formed using an oxide semiconductor

Methodology Applied
Scientific EffectSemiconductor conduction: Conduction (electrical)

Data Source

PatentUS9349454B2Semiconductor device and electronic device
Publication Date: 2016.05.24 SEMICON ENERGY LAB CO LTD
  • US9349454B2 patent drawing
  • US9349454B2 patent drawing
  • US9349454B2 patent drawing

AI summary

A semiconductor device capable of generating a signal (e.g., a potential signal or a current signal) suitable for usage environment or a purpose. The semiconductor device includes a first memory circuit, a first circuit, and a second memory circuit. The first circuit converts a digital signal input from the first memory circuit into an analog signal. The first memory circuit includes an input node, an output node, a transistor, and a capacitor. The capacitor is electrically connected to the output node. The transistor can control a conduction state between the input node and the output node. An analog signal is input to the input node from the first circuit. The transistor includes an oxide semiconductor layer where a channel formation region is formed.