Semiconductor Device Fabrication via Blocking Layer Segmentation
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Solution Overview
Problem
The continuous reduction in semiconductor device feature size poses challenges to photolithography, leading to increased complexity and cost due to the need for multiple processing steps and high density of dividing layers in existing double patterning techniques.
Innovation Solution
A method involving the formation of a blocking layer with discrete blocking openings in a semiconductor device, allowing for the formation of dividing layers with different densities in a single process step, thereby simplifying the fabrication process and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If existing double patterning techniques are used to overcome photolithographic limits, then manufacturing precision is improved, but device complexity and cost increase
Solution Approach 1:
The patent segments the patterning process into distinct stages: forming a first mask layer with initial patterns, depositing a blocking layer, forming dividing layers within the blocking layer to create finer subdivisions, and selectively removing portions. This segmentation allows achieving high precision patterns while managing process complexity through structured, modular steps rather than attempting single-step patterning
Solution Approach 2:
The patent introduces a vertical dimension by forming a blocking layer above the first mask layer and creating dividing layers within this third dimension. This vertical stacking approach enables additional pattern divisions without requiring proportional increases in lateral processing complexity, effectively adding a new dimension to the patterning strategy
2Manufacturing precision
If existing double patterning techniques are used to overcome photolithographic limits, then manufacturing precision is improved, but manufacturing cost increases
Solution Approach 1:
The patent merges multiple patterning operations into a unified process flow where the blocking layer serves multiple functions: it protects underlying structures, provides a medium for forming dividing layers, and enables selective removal to create final patterns. By combining these functions into a single integrated structure rather than separate processing steps, the patent reduces overall manufacturing cost while maintaining high precision
3Manufacturing precision
If high density of dividing layers is used in existing techniques, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The patent resolves the contradiction between high pattern density and structural complexity by moving the dividing layers into the vertical dimension within the blocking layer. This allows achieving high lateral pattern density without proportionally increasing the complexity of individual layer structures, as the dividing layers are organized vertically rather than requiring complex lateral arrangements
Data Source
AI summary
A semiconductor device and its fabrication method are provided. The method includes providing a layer to be etched; forming a first mask layer on the layer to be etched; forming a first trench and a second trench in the first mask layer; forming a blocking layer over the first mask layer, where a portion of the blocking layer is formed in a first portion of the first trench and a first portion of the second trench; forming a first dividing layer in a first blocking opening to divide the first trench along a first direction; when forming the first dividing layer, forming second dividing layers on two sidewalls of a second blocking opening and arranged along the first direction, where the second dividing layers divide the second trench along the first direction; and after forming the first dividing layer and the second dividing layers, removing the blocking layer.