Semiconductor Package Bonding Layout for Warp Suppression
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Solution Overview
Problem
Existing semiconductor apparatuses face issues with warping and waving due to the diversified shapes of semiconductor chips, which can lead to structural instability.
Innovation Solution
The semiconductor apparatus is designed with a specific arrangement of bonding members around the semiconductor device, where the number of rows in certain directions is less than in others, and the distances between these rows are carefully controlled to constrain thermal deformation, reducing anisotropy and thus minimizing warping and waving.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If bonding members are arranged uniformly in all directions, then the structure is simple and easy to manufacture, but thermal deformation anisotropy increases causing warping and waving
Solution Approach 1:
The bonding members are arranged asymmetrically with different row counts in different directions: two rows in the first direction and one row in the second direction. This asymmetric arrangement compensates for the rectangular chip geometry, balancing the thermal deformation constraints in both directions and preventing warping and waving while maintaining manufacturing simplicity.
2Adaptability or versatility
If the semiconductor chip has a rectangular shape with different side lengths, then it can accommodate various device configurations, but it causes anisotropic thermal deformation leading to warping and waving
Solution Approach 1:
The asymmetric bonding member arrangement (two rows in one direction, one row in the other) is specifically designed to match the rectangular chip geometry. This creates balanced constraint forces that counteract the anisotropic thermal deformation caused by the rectangular shape, allowing the chip to maintain its versatile rectangular form while preventing warping and waving.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces the anisotropy of thermal deformation, minimizing warping and waving by ensuring balanced constraint from both the upper and lower substrates and the semiconductor device, enhancing structural stability.
Implementation Method 1
a number of rows in the third rows and a number of rows in the fourth rows are each less than both a number of rows in the first rows and a number of rows in the second rows
Data Source
AI summary
A semiconductor apparatus includes a first substrate having a first major surface and a plurality of first conductive pads on the first major surface, a second substrate having a second major surface opposing the first major surface, and having a plurality of second conductive pads on the second major surface, a semiconductor device disposed between the first substrate and the second substrate and mounted on the first major surface of the first substrate, and a plurality of bonding members that bond the first conductive pads and the second conductive pads together, wherein in a plan view normal to the first major surface, the first substrate has a rectangular plane shape with a first side and a second side each extending parallel to a first direction, and a third side and a fourth side each extending parallel to a second direction perpendicular to the first direction.