Compound Semiconductor Bonding Structure for Level Difference Suppression
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Solution Overview
Problem
The manufacturing of semiconductor devices is hindered by the size of the growth substrate, leading to defects and limitations in process efficiency due to level differences between the semiconductor layer and the temporary substrate.
Innovation Solution
A method involving the formation of a buried layer to fill the level difference between the semiconductor layer and the temporary substrate, allowing for electrical coupling with a readout circuit substrate through a wiring layer, thereby reducing defects and enabling manufacturing without size constraints from the growth substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the semiconductor layer is bonded directly to the temporary substrate without filling the level difference, then the manufacturing process is simpler, but defects occur due to the level difference between the semiconductor layer and temporary substrate
Solution Approach 1:
The patent applies preliminary action by forming the buried layer to fill the level difference between the semiconductor layer and temporary substrate before bonding them together. This preparatory step eliminates the level difference that would cause defects during subsequent manufacturing processes, ensuring reliable bonding while maintaining process simplicity.
2Ease of manufacture
If the growth substrate size is constrained, then the manufacturing process is easier to control, but the device size cannot be reduced
Solution Approach 1:
The patent applies segmentation by separating the growth substrate from the final device structure. The semiconductor layer is grown on a small growth substrate, then transferred to a larger temporary substrate using the buried layer filling technique. This allows the device to be downsized for efficient growth while the final product can utilize larger substrate areas for improved performance.
3Productivity
If a larger temporary substrate is used, then manufacturing efficiency improves, but the level difference between semiconductor layer and temporary substrate increases
Solution Approach 1:
The patent uses the buried layer as an intermediary element between the semiconductor layer and the large temporary substrate. This buried layer fills the level difference, creating a planar surface that enables precise bonding and subsequent processing steps, thereby maintaining manufacturing precision while allowing the use of large temporary substrates for improved productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach suppresses defects caused by level differences, facilitates downsizing of semiconductor devices, and allows for the use of larger temporary substrates, improving manufacturing efficiency and device performance.
Implementation Method 1
bonding the semiconductor layer to a temporary substrate
Implementation Method 2
forming a buried layer that fills a level difference between the semiconductor layer and the temporary substrate
Implementation Method 3
a photoelectric conversion layer that includes a group III-V semiconductor such as, for example, indium gallium arsenide (InGaAs). Such a photoelectric conversion layer generates electrical charges through absorption of infrared light (performs photoelectric conversion)
Data Source
Figure 1A
Figure 1B
Figure 2
AI summary
A semiconductor device including a device substrate and a readout circuit substrate. The device substrate includes a device region and a peripheral region. In the device region, a wiring layer and a first semiconductor layer including a compound semiconductor material are stacked. The peripheral region is disposed outside the device region. The readout circuit substrate faces the first semiconductor layer with the wiring layer in between, and is electrically coupled to the first semiconductor layer through the wiring layer. The peripheral region of the device substrate has a junction surface with the readout circuit substrate.