Semiconductor Structure Bonding for Larger Memory Arrays
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Solution Overview
Problem
Existing semiconductor manufacturing methods face challenges in increasing memory array footprint due to thermal budget affecting circuit characteristics and difficulties in hybrid bonding processes with precise alignment requirements.
Innovation Solution
A semiconductor structure is manufactured by forming a device layer on a first substrate, followed by bonding a second substrate with a dielectric layer to a first dielectric layer, then splitting the second substrate to form a circuit layer, allowing for easier alignment and avoiding thermal budget impact on the circuit layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the circuit layer is formed first on the whole active area of the substrate, then the memory array footprint can be increased, but the circuit layer characteristics are adversely affected by the thermal budget from the memory array manufacturing process
Solution Approach 1:
The substrate is divided into two separate substrates: a first substrate for forming the device layer (memory array) and a second substrate for forming the circuit layer. This segmentation allows independent processing of each layer, enabling the memory array to be manufactured with high thermal budget processes while the circuit layer remains unaffected by thermal damage.
Solution Approach 2:
The device layer is formed on the first substrate first, followed by bonding the second substrate with its circuit layer to the first dielectric layer. By preparing the device layer in advance on a separate substrate, the thermal budget processes can be completed before the circuit layer is introduced, preventing thermal damage to the circuit characteristics.
2Area of moving object
If the memory array structure is bonded to the circuit layer using hybrid bonding process, then the memory array footprint can be increased, but the manufacturing complexity increases due to metal and dielectric materials bonding simultaneously with fine element pitches and precise alignment requirements
Solution Approach 1:
The second substrate is removed (taken out) after the circuit layer is formed on it. This extraction simplifies the bonding process because only the circuit layer needs to be bonded to the first dielectric layer, not the entire second substrate with its complex circuit structures. The removal of the second substrate eliminates the need for complex hybrid bonding of metal and dielectric materials simultaneously.
Solution Approach 2:
The first dielectric layer serves as an intermediary bonding interface between the device layer on the first substrate and the circuit layer on the second substrate. This intermediary layer facilitates simplified bonding conditions, allowing the circuit layer to be bonded without the complexity of hybrid bonding processes required when directly bonding metal and dielectric materials.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables a larger memory array footprint with a simpler manufacturing process, ensuring the circuit layer is not deteriorated by thermal processes and facilitating precise alignment without hybrid bonding complexities.
Implementation Method 1
the second dielectric layer is bonded with the first dielectric layer
Data Source
AI summary
A semiconductor structure is provided. The semiconductor structure includes a first substrate, a device layer, a first dielectric layer, a second dielectric layer, a second substrate, and a circuit layer. The device layer is disposed on the first substrate. The first dielectric layer is disposed on the device layer. The second dielectric layer is disposed on the first dielectric layer. The second substrate is disposed on the second dielectric layer. The circuit layer is disposed on the second substrate.