Semiconductor Bonding Structure With Intermediate Metal Positioning
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Solution Overview
Problem
Conventional semiconductor devices face challenges in maintaining proper bonding due to displacement of semiconductor elements during the solid phase diffusion bonding process, which can be attributed to impurities and misalignment between the semiconductor elements and the support substrate.
Innovation Solution
Incorporating an intermediate metal layer between the semiconductor element and the support substrate, with positioning portions to prevent relative movement, allowing for solid phase diffusion bonding without the need for temporary adhesives and minimizing impurities at the bonding interface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If semiconductor elements are directly bonded to the support substrate by solid phase diffusion bonding, then bonding strength is improved, but displacement of semiconductor elements occurs during bonding
Solution Approach 1:
An intermediate metal layer is introduced between the semiconductor element and the support substrate. This intermediate layer serves as a mediator that enables solid phase diffusion bonding while providing positioning portions to prevent displacement during the bonding process, thus resolving the contradiction between achieving strong bonding and maintaining positioning accuracy.
2Manufacturing precision
If temporary adhesives are used to prevent displacement, then positioning accuracy is improved, but impurities are introduced at the bonding interface
Solution Approach 1:
The intermediate metal layer acts as a mediator that provides positioning functionality without introducing impurities. The positioning portions are formed as integral parts of the intermediate metal layer structure, eliminating the need for temporary adhesives and thus preventing contamination at the bonding interface while maintaining positioning accuracy.
Solution Approach 2:
The intermediate metal layer structure is designed to be self-positioning through its geometric configuration (positioning portions). The structure inherently prevents displacement during bonding without requiring external adhesives or additional positioning components, achieving self-service functionality that avoids introducing harmful impurities.
3Manufacturing precision
If positioning structures are added to prevent displacement, then positioning accuracy is improved, but device complexity increases
Solution Approach 1:
The intermediate metal layer is designed to serve multiple functions simultaneously: it provides the bonding interface for solid phase diffusion bonding, incorporates positioning portions to prevent displacement, and maintains structural integrity. This multi-functionality reduces the need for separate positioning components, thereby limiting the increase in device complexity while achieving improved positioning accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses the displacement of semiconductor elements during bonding, ensuring reliable solid phase diffusion bonding and improving manufacturing efficiency by preventing electrical misconnection and reducing impurities at the bonding interface.
Implementation Method 1
the semiconductor element and the intermediate metal layer are bonded by solid phase diffusion bonding
Data Source
AI summary
There is provided a semiconductor device including: a semiconductor element; a support substrate configured to support the semiconductor element; an intermediate metal layer interposed between the semiconductor element and the support substrate in a thickness direction of the support substrate, wherein the semiconductor element and the intermediate metal layer are bonded by solid phase diffusion bonding; and a first positioning portion including a portion of the semiconductor element and a first portion of the intermediate metal layer and configured to suppress relative movement between the semiconductor element and the intermediate metal layer.