Semiconductor Bonding Pads with Metal Patterns
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Solution Overview
Problem
Current semiconductor devices face challenges in increasing integration density while reducing volume and processing high-capacity data, requiring more efficient bonding and wiring processes to improve reliability and reduce costs.
Innovation Solution
A semiconductor device design that simultaneously forms bonding pads and metal patterns, utilizing a layered structure with varying insulating layer thicknesses to enhance bonding strength and electrical connection reliability, allowing for copper-to-copper bonding and hybrid bonding between insulating layers, thereby reducing process complexity and costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If bonding pads and metal patterns are formed separately in different processes, then manufacturing precision and reliability are maintained, but process complexity and manufacturing costs increase
Solution Approach 1:
The patent combines the formation of bonding pads and metal patterns into a single simultaneous process step. Both structures are formed from the same insulating layer without requiring separate patterning and deposition processes, thereby reducing process complexity while maintaining manufacturing precision through unified process control
Solution Approach 2:
The insulating layer serves multiple functions: it acts as both the base material for bonding pads and as the wiring layer for metal patterns. This multi-functional use of the same layer eliminates the need for separate process steps for each structure type, reducing overall manufacturing complexity
2Productivity
If wafer bonding is used to increase integration density, then device capacity increases, but bonding reliability and electrical connection stability may be compromised
Solution Approach 1:
The patent applies different thicknesses of the insulating layer at different locations: a first thickness for the bonding pad region and a second thickness for the metal pattern region. This local variation optimizes bonding reliability at the bonding interface while maintaining proper electrical connections for the metal patterns, thereby achieving both high integration density and bonding reliability
Solution Approach 2:
The patent changes the physical parameter of insulating layer thickness to optimize different functional regions. By adjusting the thickness parameter locally, the bonding surface area and electrical connection characteristics are optimized simultaneously, ensuring both bonding reliability and electrical performance in the bonded structure
3Productivity
If multiple separate processes are used to form bonding structures and wiring, then structural integrity is maintained, but manufacturing costs and process time increase
Solution Approach 1:
The patent merges the formation of bonding pads and metal patterns into a single simultaneous process, reducing the total number of manufacturing steps. This increases manufacturing efficiency while maintaining structural integrity because both structures are formed from the same insulating layer with unified process control, ensuring consistent material properties and bonding strength
Data Source
AI summary
A semiconductor device includes a first structure including a first bonding structure, and a second structure on the first structure and including a second bonding structure connected to the first bonding structure. The first bonding structure includes a first insulating layer, a first bonding insulating layer on the first insulating layer, first bonding pads penetrating at least a portion of the first insulating layer and the first bonding insulating layer, and first metal patterns in the first insulating layer and in contact with the first bonding insulating layer, and having an upper surface at a lower level than upper surfaces of the first bonding pads. The second bonding structure includes a second bonding insulating layer bonded to the first bonding insulating layer, a second insulating layer on the second bonding insulating layer, and second bonding pads penetrating the second bonding insulating layer and connected to the first bonding pads.