Semiconductor Bonding Alignment Using Vernier Scale Patterns

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Solution Overview

Problem

Existing semiconductor bonding processes face challenges in achieving precise alignment and efficient yield rates due to misalignment during the bonding of semiconductor devices, leading to increased production time and labor.

Innovation Solution

The use of a flip chip bonding apparatus equipped with an infrared inspection device that detects offset values through Vernier scale patterns on semiconductor devices, allowing real-time alignment adjustments and initial defect inspection, thereby improving the bonding process efficiency and yield rate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional alignment methods are used during bonding, then the bonding process can be completed, but misalignment occurs leading to reduced manufacturing precision

Engineering Contradiction:
Improvealignment precisionVSAvoidproduction time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing alignment inspection using Vernier scale patterns before the actual bonding process. The infrared inspection device detects offset values in advance, allowing alignment adjustments to be made prior to bonding, thereby preventing misalignment without adding time during the bonding process itself.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by using the infrared inspection device to detect offset values between workpieces through Vernier scale patterns. This detection provides real-time feedback on alignment status, enabling precise adjustments to be made based on actual measured deviations, thus improving alignment precision while maintaining efficient production timing.

Inventive Principle:
Principle #23Feedback

2Manufacturing precision

If alignment inspection is performed during bonding, then manufacturing precision improves, but the complexity of the bonding apparatus increases

Engineering Contradiction:
Improvealignment precisionVSAvoidbonding apparatus complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies universality by designing the bonding apparatus to perform multiple functions: the infrared inspection device not only detects alignment through Vernier scale patterns but also identifies defects. This multi-functionality integrates alignment inspection and defect detection into a single system, improving manufacturing precision without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If Vernier scale patterns are used for alignment detection, then measurement precision improves, but the difficulty of detecting and measuring increases due to the need for specialized infrared inspection

Engineering Contradiction:
Improveoffset detection precisionVSAvoidinspection complexity
Core Design Contradiction:
Measurement precisionVSDifficulty of detecting and measuring

Solution Approach 1:

The patent applies mechanics substitution by replacing traditional mechanical alignment measurement methods with an infrared optical inspection system. The infrared inspection device detects Vernier scale patterns optically rather than mechanically, achieving high measurement precision while reducing the physical complexity and contact requirements of the inspection process.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The infrared inspection device provides precise alignment and defect detection, reducing production time and enhancing the manufacturing yield by ensuring accurate bonding of semiconductor devices.

Implementation Method 1

an infrared inspection device that detects offset values through Vernier scale patterns on semiconductor devices

Methodology Applied
Scientific EffectInfrared radiation detection: Infrared Radiation

Data Source

PatentUS20250329695A1Semiconductor package and method of bonding workpieces
Publication Date: 2025.10.23 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250329695A1 patent drawing
  • US20250329695A1 patent drawing
  • US20250329695A1 patent drawing

AI summary

A semiconductor package includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a first alignment pattern having a plurality of first scale patterns arranged in a first direction. The second semiconductor device is mounted over the first semiconductor device and includes a second alignment pattern having a plurality of second scale patterns arranged in a second direction parallel to the first direction, and a scale pitch of the first scale patterns is different from a scale pitch of the second scale patterns.