Semiconductor Boot-Up Control Using Nonvolatile Memory Regions
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Solution Overview
Problem
Existing semiconductor devices using e-fuse arrays face challenges in stable operation due to the inability to immediately call data during boot-up, leading to suboptimal setting and repair operations, as the e-fuse array circuit requires processing time and cannot operate with optimal setting values.
Innovation Solution
A semiconductor device architecture that includes a nonvolatile memory circuit with separate regions for storing data, a control circuit to manage boot-up operations, and registers for temporarily storing data, allowing for a first boot-up operation at a lower speed with higher read voltage and a second boot-up operation at a higher speed with optimal voltage levels, ensuring stable and efficient data transfer and operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the e-fuse array circuit processes data during boot-up, then data can be stored and recognized, but the processing time causes delay in obtaining optimal setting values
Solution Approach 1:
The patent applies preliminary action by pre-processing data in the e-fuse array circuit before the main controller needs it. The e-fuse array circuit performs data processing in advance during the boot-up phase, so that when the main controller requests data, the processing is already complete or in progress, reducing the overall boot-up time while ensuring reliable data availability.
2Productivity
If the nonvolatile memory circuit operates at high speed during boot-up, then data transfer is faster, but operation stability deteriorates due to suboptimal setting values
Solution Approach 1:
The patent applies dynamics by making the operating speed of the nonvolatile memory circuit adjustable rather than fixed. The circuit can dynamically change its operating speed based on the boot-up phase: operating at lower speeds when setting values are not yet optimal, and transitioning to higher speeds once optimal settings are established, thus balancing stability and productivity throughout the operation.
3Measurement precision
If the read voltage is increased for data recognition, then data recognition accuracy improves, but power consumption and circuit stress increase
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the read voltage level based on the operational phase and data recognition needs. During boot-up when data recognition accuracy is critical, the read voltage is increased to ensure proper reading. Once the system is fully operational and data is readily available, the read voltage can be reduced to lower power consumption, thus optimizing the trade-off between measurement precision and energy usage.
Data Source
AI summary
A semiconductor device includes one or more internal circuits; a nonvolatile memory circuit including a first region suitable for storing first data for the nonvolatile memory circuit and a second region suitable for storing second data for the internal circuits; a first register suitable for temporarily storing the first data; one or more second registers suitable for temporarily storing the second data; and a control circuit suitable for controlling the nonvolatile memory circuit to transmit the first data and the second data to the first register and to the second registers, respectively, when a boot-up operation is performed.