Semiconductor Bottom Electrode Structure with Dummy Support
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Solution Overview
Problem
As the integration of semiconductor devices like DRAMs increases, there is a need to prevent capacitors from falling or tearing at the edge of the wafer and to improve process variance during manufacturing.
Innovation Solution
A method of manufacturing semiconductor devices involves forming a bottom electrode structure with supporters in the chip area and a dummy structure with specific film layers in the edge area, ensuring the bottom electrode structure and dummy structure have the same height, which helps prevent capacitor failure and reduces process variance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If capacitors are formed with greater height and three-dimensional bottom electrode structure to increase electrostatic capacity, then integration degree and capacity are improved, but capacitors may fall or tear at the edge area of the wafer
Solution Approach 1:
The wafer is divided into a chip area and an edge area, with different structures formed in each region. The chip area contains the functional capacitor structures while the edge area contains dummy structures that segment the overall structure to prevent falling and tearing
Solution Approach 2:
Dummy structures are created as copies of the bottom electrode structure in the edge area. These dummy structures replicate the three-dimensional form and height of the functional bottom electrodes, providing the same mechanical support and preventing edge defects without adding functional capacity
2Quantity of substance
If capacitors are formed with greater height and three-dimensional structure, then electrostatic capacity is improved, but process variance increases
Solution Approach 1:
The dummy structures in the edge area are made homogeneous with the functional bottom electrodes in the chip area, using the same materials and achieving the same height. This homogeneity ensures that the entire wafer surface undergoes uniform processing, reducing process variance
Solution Approach 2:
The dummy structures are designed to be at the same level and height as the functional bottom electrodes, creating an equipotential surface across the wafer. This uniform elevation ensures consistent planarization and reduces variations in subsequent processing steps
3Reliability
If dummy structures are formed in the edge area with the same height as the bottom electrode structure, then capacitor falling and tearing are prevented, but device complexity increases
Solution Approach 1:
Different structures are applied to different regions of the wafer: the chip area receives the functional capacitor structure while the edge area receives the dummy structure. This local differentiation provides the necessary mechanical support only where needed (at the edges) without complicating the functional area
Data Source
AI summary
A method of manufacturing a semiconductor device includes: preparing a wafer in which a first cell area and a second cell area are defined; forming a bottom electrode structure in the first cell area and a dummy structure located in the second cell area; and sequentially forming a dielectric layer and a top electrode on the bottom electrode structure and the dummy structure, wherein the bottom electrode structure includes a plurality of bottom electrodes extending in a first direction in the first cell area and first and second supporters to support the plurality of bottom electrodes, wherein the dummy structure includes a first mold film, a first supporter film, a second mold film, and a second supporter film that are sequentially formed to cover the second cell area, and the second supporter and the second supporter film are at a same level relative to the wafer.